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Welcome to the issue of March 3rd, 2025 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.
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64G UCIe D2D PHY and Controller Subsystem
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• Fully integrated and highly configurable subsystem: PHY and Controller
• Builds on the success of the most recent 36Gbps UCIe IP subsystem
• 24G silicon-proven with advanced package (2.5D) and standard package (2D)
• Per-lane health monitoring and full DFT features
• In-house 2.5D/3D packaging expertise
Learn more at awavesemi.com >>
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What they said at IP SoC EU 24
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Interview with Dr. Calliope-Louisa Sotiropoulou - CAST, Inc.
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Interview with Patrick Döll - Physical IC Design Engineer - Racyics GmbH
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Interview with Luca TESTA - Cofounder & COO - Keysom
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Interview with Ettore Antonino Giliberti - Senior Staff Application Engineer - SmartDV Technologies
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Innovating the Future with SOIL: Next-Gen IPs, Transfer from Research to Silicon
Damian Panter, Fraunhofer
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From silicon to the use cases, SOIL as a test bench for automotive applications
Leonardo Govoni, AED Vantage GmbH
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Designing SOC with ABX® - Challenges and Solutions
Florian Bilstein, Director Design Service, Racyics GmbH
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Wireless and Batteryless Interface for IoT
Polina Proskurova, Project Manager, NTLab
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How to select the best Audio codec architecture to enhance your wearables?
Etienne Faucher, Product Marketing Manager, Dolphin Semiconductor
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