D&R News Alert
April 17th, 2025
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Welcome to the issue of April 17th, 2025 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Foundry Ecosystem News
■ AMD Achieves First TSMC N2 Product Silicon Milestone
Design Platform and Services
■ Orthogone Technologies and Blackcore® Technologies Announce Strategic Partnership to Deliver Ultra-Low Latency Solutions for High-Frequency Trading
■ How to Design Secure SoCs: Essential Security Features for Digital Designers - By KiviCore
■ Secafy selects Siemens’ EDA tools for innovative hardware security development
Design Partner of the Week
GUC HBM4 & UCIe Total Service Package
GUC
  • Complete service scope, including IP, CoWoS design and production
  • Industry-first N3P HBM4/12G IP taped out in Mar’25
  • N3P UCIe 32G and N5 40G Low-Power IP
  • Visit GUC at tsmc NA Technology Symposium (booth : 203)
 Learn more...

Interconnect
■ How NoC architecture solves MCU design challenges
Analog IP
■ Omni Design Technologies Offers 3nm, Single Core-voltage Supply Rail Process, Voltage and Temperature (PVT) Monitor
Siemens Discover Tessent Embedded Analytics from Siemens EDA

• System-wide real-time debug & post-deployment analytics for complex SoCs
• DEBUG: Identify & resolve errors significantly faster than traditional solutions
• OPTIMIZE: Identify root cause of under-performance related to CPU, memory & other SoC components
• DEPLOY: Monitor & collect data for continuous analysis and optimization
Learn more >>

Memory interface
■ Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
GPU
■ VeriSilicon Launches Ultra-Low Power OpenGL ES GPU with Hybrid 3D/2.5D Rendering for Wearables
PCIe 7.0? Understanding Why Now is the Time to Transition
Synopsys This Synopsys Webinar will cover:
• Address bifurcation challenges
• 16X support in Gen 7
• Enhanced latency and power efficiency
 Register Now! >>

Artificial Intelligence
■ Smart and compact sensors with Edge-AI
■ Silicon Photonics Enables Low-power AI Accelerator Platform
Audio/Video
■ Doteck Integrates intoPIX JPEG XS for High-Performance ST 2110 8K & 4K Encoding
■ eDP/DP 1.4 Tx PHY & Controller IP Cores Now Available to Meet Rising Demand for High-Performance Display Solutions with Next-Gen Visual Connectivity
Networking
■ New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
Integrate Embedded Security and Accelerate IC Deployment
PUFrt Secures Entire System from the Hardware Foundation
 PUF Security
• All-in-one Macro: Anti-fuse OTP+PUF+TRNG+Anti-tamper Shell+Controllers
Discover PUFrt
• Enhance Security Features with Integrated Cryptographic Co-Processor
Discover PUFcc
• Optimize System Performance with Integrated Hardware Security Module
Discover PUFhsm

Automotive
■ BOS Semiconductors at Auto Shanghai 2025
Partner News
■ Cadence to Acquire Arm Artisan Foundation IP Business
■ Vertex Growth commits €10M in Dolphin Semiconductor
Business News
■ Taiwan to focus on silicon photonics, build new economic shield
■ Intel Announces Strategic Investment by Silver Lake in Altera
■ Gartner Says Worldwide Semiconductor Revenue Grew 21% in 2024
Do not miss IP-SoC
Silicon Valley 2025
Opens on April 24th, 2025 		Last Chance
to Register >>







True Circuits

Why settle for old DDR technology when doing chips at older nodes? TCI offers a production proven TSMC 40G LPDDR5-3200 hard PHY configured to your exact floorplan.

TSMC 40nm G 3200Mbps LPDDR5 PHY >>
Learn more >>

New IP
• 12-bit, 5 GSPS Analog-to-Digital Converter by Alphacore
• DiFi IP core by Chip Interfaces
• Special Purpose Low (Statistical) offset Operation Amplifier by Weasic Microelectronics
• PCIe 6.0 PHY IP for TSMC N4P by Synopsys
• High Bandwidth Memory 3 (HBM3/3E) IP optimized for Samsung SF4X by SkyeChip

What they said at
IP SoC EU 24

Interview with Patrick Döll - Physical IC Design Engineer - Racyics GmbH

Interview with Luca TESTA - Cofounder & COO - Keysom

Interview with Ettore Antonino Giliberti - Senior Staff Application Engineer - SmartDV Technologies

Innovating the Future with SOIL: Next-Gen IPs, Transfer from Research to Silicon
Damian Panter, Fraunhofer

From silicon to the use cases, SOIL as a test bench for automotive applications
Leonardo Govoni, AED Vantage GmbH

Designing SOC with ABX® - Challenges and Solutions
Florian Bilstein, Director Design Service, Racyics GmbH

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