D&R News Alert
May 1st, 2025
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Welcome to the issue of May 1st, 2025 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Foundry Ecosystem News
■ Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
■ SkyeChip Joins Intel Foundry Accelerator IP Alliance
■ QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
Packaging Solution
■ Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
Design Platform
■ Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
■ Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
■ Thalia enhances AMALIA Platform with new AI models to revolutionize analog, RF and mixed-signal IC
Memory IP
■ CFX 0.13μm eFuse OTP IP has been applied in the mass production of over 15,000 CMOS image sensors
Rambus
HBM4 Controller

• Industry’s first HBM4 Memory Controller IP
• High bandwidth memory for AI accelerators, graphics and HPC applications
• Data rate up to 10 Gb/s
• 2.56 TB/s of memory throughput
Learn More >>

RISC-V
■ Codasip launches complete exploration platform to accelerate CHERI adoption
Automotive
■ VeriSilicon Launches the Industry-Leading Automotive-Grade Intelligent Driving SoC Design Platform
Security IP
■ PQShield launches UltraPQ-Suite for deeply specialized implementations of post-quantum cryptography
■ BrainChip Collaborates with Chelpis-Mirle on Security Solution
■ EU Bolsters Cybersecurity With NIS2 Directive
Products
 ❖ PQShield - High Capacity Post-Quantum Cryptography Processor (PQF-HW-LAT)
❖ PQShield - Post-quantum secure root of trust subsystem

Audio/Video IP
■ New Audio Sample Rate Converter (ASRC) IP Core from CAST Offers Versatility with High Fidelity
Space
■ NEXT Semiconductor Technologies Collaborates with BAE Systems to Develop Next Generation Space-Qualified Chips
Artificial Intelligence
■ VSORA Raises $46 Million to Bring World’s Most Powerful AI Inference Chip to Market
■ European AI processor developer gets €40m for manufacturing
Business News
■ UK grants 2D semiconductor research £6 million
■ EU likely to miss 2030 microchip target





New IP
• Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port) by Nordic Semiconductor
• Image processing specialized NPU by Chips&Media
• DDR5 PHY IP for TSMC N3P by Synopsys
• 13-bit, 80 MSPS Analog-to-Digital Converter IP Block by Alphacore
• MIPI CSI-2 by Chip Interfaces

What they said at
IP SoC Silicon Valley 25

Securing Devices/embedded Systems Lifecycle management
Karthik Raj Shekar, Field Application Engineer presales & Junior Project Manager, Secure-IC

Interview with Nidish Kamath - Director of Product Management for Memory Interface IP - Rambus, Inc.

Interview with Justin Endo - Director, Marketing & Sales - Mixel, Inc.

Interview with Steven Brightfield - Chief Marketing Officer - BrainChip Inc.

Interview with Dana Neustadter - Sr. Director of Product Management Security IP - Synopsys, Inc.

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