501 0.118

DDRx Bist Controller with I2C slave and multi-channel AMBA master DDRx Bist Controller with I2C slave and multi-channel AMBA master...

502 0.118

DFI Wrapper DFI Wrapper...

503 0.118

DFI3.1 Wrapper for DDR3/DDR4/LPDDR2/LPDDR3 PHY DFI3.1 Wrapper for DDR3/DDR4/LPDDR2/LPDDR3 PHY...

504 0.118

Embedded flash controller The embedded flash controller (EFC) is flash memory device controlling apparatus and developed based on the Embedded Flash Macro (EFM) of pFusion co. ...

505 0.118

Flash Memory pre-fetcher controller with AHB lite system Flash Memory pre-fetcher controller with AHB lite system...

506 0.118

Embedded flash controller for UMC 55LP Spit Gate embedded Flash. Embedded flash controller for UMC 55LP Spit Gate embedded Flash....

507 0.118

Embedded synchronous single port SRAM/ROM memory controller with AXI slave port. Embedded synchronous single port SRAM/ROM memory controller with AXI slave port....

508 0.118

Memory Controller IP, Memory Stick controller, Soft IP Memory Stick host controller with AHB Bus....

509 0.118

Memory Controller IP, NAND Flash memory Host controller, Soft IP NAND flash host controller with AHB interface, it supports SLC and MLC NAND flash....

510 0.118

Compact Flash host interface controller with APB interface. ...

511 0.118

Secure digital card host controller with APB interface. Secure digital card host controller with APB interface....

512 0.118

SD Host Controller IP, SD host spec. v3.0, SDIO spec. v2.0, MMC spec. v4.3, Supports UHS50/UHS104 card, Soft IP SD host controller wih ahb interface, compliant with the SD Host Controller Standard Specification Version 3.00....

513 0.118

Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um LL process UMC 0.18um LL Logic process synchronous high density Single Port SRAM memory compiler....

514 0.118

Single Port SRAM Compiler IP, UMC 0.15um SP process UMC 0.15um SP Logic process synchronousultra high speed Single Port SRAM memory compiler....

515 0.118

Single Port SRAM Compiler IP, UMC 0.13um SP/FSG process UMC 0.13um SP/FSG Logic process high density synchronous high density Single Port SRAM memory compiler....

516 0.118

Single Port SRAM Compiler IP, UMC 0.13um HS/FSG process UMC 0.13um HS/LL fusion (FSG) process high density synchronous high density Single Port SRAM memory compiler....

517 0.118

Single Port SRAM Compiler IP, UMC 0.13um CIS process UMC 0.13um CMOS Image Sensor process synchronous high density Single Port SRAM memory compiler....

518 0.118

Single Port SRAM Compiler IP, UMC 0.15um SP process UMC 0.15um SP Logic process synchronous high density Single Port SRAM memory compiler....

519 0.118

Single Port SRAM Compiler IP, UMC 90nm LL process UMC 90nm LL/RVT Synchronous high density Single Port SRAM memory compiler....

520 0.118

Flash Memory Controller IP, Support NAND type Flash memory of 8MB - 2 GB, 24 ECC bits per 512 bytes, Soft IP NAND-type Flash Controller with AHB interface which supports page size for 512B and 2KB, data width for 8/16-Bit and DMA handshaking protocol....

521 0.118

Single Port SRAM Compiler IP, UMC 65nm SP process UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler....

522 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....

523 0.118

Single Port SRAM Compiler IP, UMC 0.162um G2 process UMC 0.162um GII Logic process synchronous high density Single Port SRAM memory compiler....

524 0.118

Single Port SRAM Compiler IP, 5.6um2 bit cells, Synchronous, UMC 0.18um eFlash/G2 process UMC 0.18um e-flash GII Logic process synchronous Single Port SRAM memory compiler....

525 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm LL process UMC 90nm LL/RVT Logic process synchronous high density Single Port SRAM memory compiler with redundancy feature....

526 0.118

DDR2/3 Controller IP, DDR2/3 controller with DFI 2.1 interfaces, Support DDR1/DDR2/DDR3 SDRAM, Soft IP DDR2/3 Combo SDRAM Controller....

527 0.118

SRAM/ROM Controller IP, SRAM/ROM Controller, Soft IP Static memory controller with AXI interface....

528 0.118

Single Port SRAM Compiler IP, UMC 0.11um LL/AE process UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process synchronous high density Single Port SRAM memory compiler....

529 0.118

Single Port SRAM Compiler IP, UMC 0.11um SP/AE process UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous High-density Single Port SRAM memory compiler....

530 0.118

Single Port SRAM Compiler IP, UMC 0.153um MS process UMC 0.153um Mixed-Mode/Logic process high density, Low Power mini Single Port SRAM....

531 0.118

Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um CIS process UMC 0.18um CMOS Image Sensor process synchronous high density Single Port SRAM memory compiler....

532 0.118

Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um MS process UMC 0.18um Mixed-Mode process synchronous high density Single Port SRAM memory compiler....

533 0.118

Single Port SRAM Compiler IP, UMC 0.25um Logic process UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler....

534 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....

535 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler with redundancy....

536 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port SRAM memory compiler....

537 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP/RVT+HVT Low-K Logic process synchronous high density Single Port SRAM memory compiler....

538 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low-K Logic process synchronous ultra high speed Single Port SRAM memory compiler....

539 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler....

540 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler with row-pair redundancy....

541 0.118

Single Port SRAM Compiler IP, UMC 65nm SP process UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM memory compiler....

542 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 65nm SP process UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM with redundaycy memory compiler....

543 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 65nm LL process UMC 65nm LL/RVT Low-K process synchronous high density, Single Port SRAM compiler with the row redundancy....

544 0.118

Single Port SRAM Compiler IP, UMC 65nm LL process UMC 65nm LL/RVT Low-K Logic process 1-port high density memory compiler....

545 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm SP process UMC 90nm SP/ Low-K Logic process Synchronous high density Single Port SRAM compiler With Redundancy....

546 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm SP process UMC 90nm SP/RVT Low-K Logic process Single Port SRAM (Introduce Redundancy feature to the existing FSD0A_B_SH)....

547 0.118

Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm LL process UMC 90nm LL/RVT Low-K Logic process Synchronous high density Single Port SRAM compiler With Redundancy....

548 0.118

Single Port SRAM Compiler IP, UMC 90nm LL process UMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler....

549 0.118

Controller IP, SPI Flash controller, Soft IP Flash Controller with SPI Interface....

550 0.0

eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FF PLUS Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...