1001 1.0

GSMC 0.18um USB 1.1 PHY The USB1.1 PHY is an IP version of USB transceiver. It receives data via DP and DM, and transfers data to USB1.1 core via RCV, VM and VP. It is design...

1002 1.0

TSMC 55nm USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1003 1.0

HLMC 55nm EF MIPI DPHY V1.2 This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1004 1.0

GLOBALFOUNDRIES 22nm FDX MIPI DPHY Slave V1.2 This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Slave side. Each l...

1005 1.0

GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V2.1/V3.0 This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...

1006 1.0

SMIC 0.11um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1007 1.0

GLOBALFOUNDARIES 22nm FDSOI USB3.0 Dual Role PHY/OTG PHY This USB3.0 PHY IP is designed according to USB3.0 and USB2.0 specification. It supports the USB3.0 5Gbps Super-Speed mode and is backward compatible ...

1008 1.0

Super-Speed Plus USB 3.2 Hub Controller USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...

1009 1.0

RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams The Digital Blocks DB-RTP-UDP-IP-AV IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor ...

1010 1.0

Serial Controller Interface Inicore’s iniSCI Slave is a synthesizable, flexible, and structured VHDL implementation of a Serial Controller Interface (SCI) that uses a two-wire bu...

1011 1.0

I2C Bus Interface The serial controller interface (Single Master) core uses a two-wire bus for communicating between integrated circuits or standard peripherals like sm...

1012 1.0

crystalless USB1.1 PHY The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...

1013 1.0

SMIC 55nm sub-LVDS Receiver The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....

1014 1.0

SMIC 55nm sub-LVDS Receiver The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....

1015 1.0

ST28nm LVDS Transmitter The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...

1016 1.0

SMIC 110nm MIPI DPHY This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1017 1.0

SMIC 55nm LL MIPI DPHY This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1018 1.0

GLOBALFOUNDRIES 0.11um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1019 1.0

GLOBALFOUNDRIES 0.13um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1020 1.0

MIPI D-PHY/sub-LVDS combo Transmitter 1.5G/1.0Gbps 4-Lane The CL12661K4T1AM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12661K4T1AM2JIP is designed to support...

1021 1.0

Camera MIPI D-PHY v1-1 1.5Gbps / sub-LVDS combo Receiver 4-Lane The CL12662K4R1AM2JIP1500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processer) and DSP. The CL12662K4...

1022 1.0

MIPI D-PHY TX/CSI2 Link Controller CD12631S4TIP is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system. This LINK IP is a soft macro IP that h...

1023 1.0

Multi-PHY Receiver Link Controller CD12842M8LRM3BM4AIP312P5 is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system. This LINK IP is a soft macr...

1024 0.6098

MIPI D-PHY TRx 5nm The MIPI D-PHY IP is a hardmacro PHY for CSI RX or DSI TX. IO pads and ESD structures are included. Extensive built-in self test features such as loop...

1025 0.3729

I2C Controller & PHY DTI I2C Controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C ...

1026 0.3729

Dolphin I2S Controller & PHY DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices. The controller is compliant with NXP Inter-IC Sound Bus Specif...

1027 0.3729

Dolphin I3C Controller & PHY DTI I3C Controller provides the logic consistent with NXP I3C specification to support the communication of low-speed integrated circuits through I3C ...

1028 0.3729

PCI/PCIX Interface 1.8V Oxide Device- TSMC 22nm 22ULP,ULL Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

1029 0.3729

PCI/PCIX Interface 1.8V Oxide Device - TSMC 28nm 28HP, 28LP, 28ULP, 28HPL, 28HPC, 28HPC+, 28HPM Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

1030 0.3729

PCI/PCIX Interface 2.5V Device - TSMC 28nm 28HP (CLN28HP) Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

1031 0.3729

PCI/PCIX Interface 2.5V Device - TSMC 40nm 40G (CLN40G) Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...

1032 0.3729

PCI/PCIX Interface 2.5V Device - TSMC 40nm 40LP (CLN40lp) Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...

1033 0.118

MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP MIPI CSI Receiver Controller....

1034 0.118

MIPI Controller IP, DSI Host, Soft IP DSI Host Controller....

1035 0.118

MIPI Controller IP, DSI Peripheral, Soft IP MIPI DSI Peripheral Controller....

1036 0.118

MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP MIPI Transmitter Controller....

1037 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, UMC 40nm LP Low-K Logic process....

1038 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process....

1039 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process, Two Lane....

1040 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Transmitter 80~1000MHz, UMC 40nm LP/RVT Low-K process....

1041 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 55nm SP process MIPI Receiver 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....

1042 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 55nm SP process MIPI Transmitter 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....

1043 0.118

PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.13um HS/FSG process PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY with Low Power feature, UMC 0.13um HS/FSG Logic process....

1044 0.118

SATA III PHY IP, Gen-3, UMC 0.11um HS/FSG process 6G/3G/1.5G Serial ATA PHY, UMC 0.11um HS/FSG Logic process....

1045 0.118

SATA III PHY IP, Gen-3, UMC 55nm SP process Serial ATA I, II, III PHY, UMC 55nm SP/RVT Low-K Logic process....

1046 0.118

USB 1.1 PHY IP, UMC 0.13um LL/FSG process USB 1.1 transceiver, UMC 0.13um LL Logic/FSG process....

1047 0.118

USB 2.0 Device PHY IP, Non-Crystal mode support, UMC 0.11um HS/AE process Crystal-Less USB2.0 PHY, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....

1048 0.118

USB 1.1.OTG PHY IP, OTG, UMC 0.11um HS/AE process USB1.1 PHY feature USB 1.1 On-The-Go PHY, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....

1049 0.118

USB 2.0 OTG PHY IP, UMC 55nm LP process USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 55nm LP Low-K Logic process....

1050 0.118

AXI system Peripheral IP, AXI Bus System Interconnect, Soft IP AXI bus interconnect....