Design & Reuse
1878 IP
1101
0.118
Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process.
Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process....
1102
0.118
USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process
USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process...
1103
0.118
USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process
USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process...
1104
0.118
28nm HPC USB3.1 gen2 PHY(10Gbps)
28nm HPC USB3.1 gen2 PHY(10Gbps)...
1105
0.118
28nm HPC+ USB3.1 gen2 PHY(10Gbps)
28nm HPC+ USB3.1 gen2 PHY(10Gbps)...
1106
0.118
Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process.
Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process....
1107
0.118
PCIe Gen4 x8 Lane Endpoint Controller
PCIe Gen4 x8 Lane Endpoint Controller...
1108
0.118
V-by-One Receiver
Analog part of 600Mbps to 4Gbps 4-lane V-By-One receiver with embedded CDR circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process....
1109
0.118
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process_x005F_x005F_x005F_x005F_x005F_x000D_
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process...
1110
0.118
MIPI Transmitter CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process
MIPI Transmitter CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process...
1111
0.118
CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process
CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process...
1112
0.118
MIPI RX 80Mbps~2.5Gbps ; UMC 28nm HPC+ process
MIPI RX 80Mbps~2.5Gbps ; UMC 28nm HPC+ process...
1113
0.118
MIPI Transmitter 80~1500MHz combo with CMOS input using MIFS C40LP Logic Process
MIPI Transmitter 80~1500MHz combo with CMOS input using MIFS C40LP Logic Process...
1114
0.118
28nm HPC x4 lane 10 Gbps SERDES
28nm HPC x4 lane 10 Gbps SERDES...
1115
0.118
Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process...
1116
0.118
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic e-Flash Process
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic e-Flash Process...
1117
0.118
USB2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process_x005F_x005F_x005F_x005F_x005F_x000D_ cost down from FZOTG266HJ0C_A
USB2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process cost down from FZOTG266HJ0C_A...
1118
0.118
USB 2.0 On-The-Go PHY; UMC 28nm HLP Process
USB 2.0 On-The-Go PHY; UMC 28nm HLP Process...
1119
0.118
ID PAD of OTG USB2.0 ; XIP 55LP/RVT LowK Logic Process
ID PAD of OTG USB2.0 ; XIP 55LP/RVT LowK Logic Process...
1120
0.118
USB3.0 OTG controller with AXI interface, support Host, Peripheral and OTG function
USB3.0 OTG controller with AXI interface, support Host, Peripheral and OTG function...
1121
0.118
The PCIe Gen3 PCS for 28nm programmable serdes.
The PCIe Gen3 PCS for 28nm programmable serdes....
1122
0.118
V-by-one(VBO) high speed receiver(RX) (includes PMA, PCS, and controller).
V-by-one(VBO) high speed receiver(RX) (includes PMA, PCS, and controller)....
1123
0.118
Receive the high speed serial signal, transfer it to parallel data and unpack the symbol packet, direct video stream output finally.
Receive the high speed serial signal, transfer it to parallel data and unpack the symbol packet, direct video stream output finally....
1124
0.118
V-by-one(VBO) high speed transmitter(TX) (includes PMA, PCS, and controller).
V-by-one(VBO) high speed transmitter(TX) (includes PMA, PCS, and controller)....
1125
0.118
FTVBOTXALL010 is a V-by-One transmitter designed for applications that take ultra-low power dissipation and high data transfer rate. This IP is compliant with the V-By-One HS Standard, Ver. 1.3. It transfers the packed packet from direct the video stream
FTVBOTXALL010 is a V-by-One transmitter designed for applications that take ultra-low power dissipation and high data transfer rate. This IP is compli...
1126
0.118
MIPI On-Die Termination ; UMC 28nm HPC process
...
1127
0.118
16Gbps multi-protocol programmable SerDes PHY in UMC 28HPC+
Faraday 16Gbps multi-protocol programmable SerDes PHY IP in UMC 28HPC+ process is designed with a system-level approach to provide optimization of pow...
1128
0.118
APB Fundamental Peripheral IP, Serial Interface controller for multiple frame formats, SSP (by TI), SPI (by Motorola), Microwire (by NS), I2S (by Philips), AC - link (by Intel) and SPDIF (by Intel), Soft IP
Synchronous serial port interface controller with APB interface....
1129
0.118
Direct memory access controller with AHB interface
Direct memory access controller with AHB interface....
1130
0.118
APB Fundamental Peripheral IP, I2C controller, Soft IP
I2C bus interface controller with APB interface....
1131
0.118
USB 1.1 Device Controller IP, Soft IP
USB 1.1 device controller with AHB interface....
1132
0.118
USB 2.0 Device Controller IP, Device controller, Soft IP
USB 2.0 device controller....
1133
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.18um G2 process
USB 1.1 On-The-Go transceiver (ECN spec), UMC 0.18um GII Logic process....
1134
0.118
AHB system Peripheral IP, IDE Host controller, Soft IP
IDE host controller with AHB interface....
1135
0.118
APB Fundamental Peripheral IP, IO controller, Soft IP
General purpose input/output controller with APB interface....
1136
0.118
APB Fundamental Peripheral IP, Keyboard/Mouse controller, Configurable keypad matrix from 4x4 to 8x16, Soft IP
Keyboard/Mouse controller with APB interface....
1137
0.118
AHB system Peripheral IP, SDRAM controller, Soft IP
Synchronous DRAM controller with AHB interface....
1138
0.118
AHB system Peripheral IP, SRAM controller, Soft IP
Static memory controller with AHB interface....
1139
0.118
SATA II PHY IP, Support SATA Gen1 1.5Gb/s and SATA Gen2 3.0Gb/s, UMC 0.18um Logic process
Single channel serial ATA PHY layer compliant with SATA spec. of 3.0Gbps....
1140
0.118
SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Serial ATA (SATA) physical layer that provides a complete range of host and device functions, UMC 0.13um HS/FSG Logic process....
1141
0.118
USB 1.1 PHY IP, UMC 0.13um HS/FSG process
USB 1.1 PHY, UMC 0.13um HS/FSG Logic process....
1142
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.13um SP/FSG process
USB 1.1 On-The-Go transceiver, UMC 0.13um SP/FSG Logic process....
1143
0.118
USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process....
1144
0.118
USB 1.1 PHY IP, UMC 0.15um SP process
USB 1.1 PHY, UMC 0.15um SP Logic process....
1145
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.15um SP process
USB 1.1 On-The-Go transceiver, UMC 0.15um SP Logic process....
1146
0.118
SATA II PHY IP, Gen-2, 1 - port, UMC 0.18um G2 process
1.5G/3.0Gbps 1 port Serial ATA PHY and ESATA, UMC 0.18um GII Logic process....
1147
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.25um Logic process
USB 1.1 On-The-Go transceiver (ECN spec), UMC 0.25um Logic process....
1148
0.118
AHB system Peripheral IP, AHB Arbiter, Soft IP
The IP is AHB Controller composed of ar-Biter, dECOder and Mux....
1149
0.118
AHB system Peripheral IP, AHB - to - APB Bridge, Soft IP
The IP is APB Bridge between AHB bus and APB bus....
1150
0.118
SATA Controller IP, SATA Gen-3 Host, Soft IP
SATA AHCI host controller with PVCI/AHB/AXI interface....