Design & Reuse
643 IP
551
0.0
HDMI 2.0b DSC 1.2 Verification IP
HDMI-Xactor is a comprehensive VIP solution for HDMI 2.0 source and sink designs. HDMI-Xactor implements a complete set of models, protocol checkers, ...
552
0.0
High Bandwidth Memory (HBM) Verification IP
HBM: HBM (High Bandwidth memory) is a high performance RAM interface for 3D-stacked DRAM. HBM has been adopted as industry standard by JEDEC. ...
553
0.0
Hybrid Memory Cube (HMC) Verification IP
HMC : Asiczen’s Verification IP for HMC provides a comprehensive set of protocol, methodology, verification and productivity features, enabling user t...
554
0.0
Hybrid Memory Cube Verification IP
Atria Logic Hybrid Memory Cube verification IP is a reusable, configurable verification component developed using SystemVerilog. The IP offers an easy...
555
0.0
I2C VMM Enabled Verification IP
eInfochips’ I2C VMM based VIP is highly configurable, reusable, scalable and extensible verification intellectual property that is suitable for verifi...
556
0.0
I3C 1.0 + I2C 4.0 + SMBus 2.0 Verification IP
I3C-Xactor is a comprehensive memory VIP solution portfolio for I3C and I2C s used by SoC and IP designers to ensure comprehensive verification and pr...
557
0.0
IEEE 1149.1 (JTAG) eVC
The JTAG eVC is a scalable and extensible tool built on top of Cadence’s industry leading Specman Elite [TM] platform, bringing best-in-class verifica...
558
0.0
IEEE 1149.7 Compact JTAG (cJTAG) uVC
The cJTAG Universal Verification Component (uVC) verifies design blocks conforming to any of the six compliance levels defined by the IEEE standard, s...
559
0.0
IEEE 1394-1995 Link Layer Controller eVC - Fully documented, off the shelf component for Veisity's Specman Elite functional verification environment.
The IEEE 1394 -1995 link layer controller (from now on referred to only as 1394) provides connectionless acknowledged data transfer services between a...
560
0.0
IEEE 1500 (SECT) eVC
The Standard for Embedded Core Test (SECT) eVC can verify a chain of one or more IEEE1500 compliant core wrappers. Whether developing a new test wrapp...
561
0.0
IrDA eVC
The Infrared Data Association (IrDA®) interface eVC is a powerful verification bundle built around the IrDA Physical Layer Specification. It can be in...
562
0.0
LIN Verification IP
LIN-Xactor is a comprehensive VIP solution for the LIN standard used by SoC and IP designers to ensure comprehensive verification and protocol and tim...
563
0.0
AMBA AXI 4.0 Verification IP
eInfochips’ AXI 4.0 Verification IP Product is the Industry’s most comprehensive protocol validation solution for predictable verification of AMBA AXI...
564
0.0
MHL 2.0 Verification IP
MHL 2.0 VIP provides a simple yet powerful user interface which drastically reduces the time and effort needed to create a verification environment an...
565
0.0
MIPI RFFE 1.0 Verification IP
MIPI-RFFE 1.0 VIP is developed using UVM technology. This VIP can be used as Master and Slave to verify Slave IP and Master IP respectively. It can al...
566
0.0
MIPI® CSI -2 OVM 2.0 Class based Verification IP
MIPI Specifications establish standards for hardware and software interfaces between the processors and peripherals typically found in mobile terminal...
567
0.0
MIPI® DSI VMM based Verification IP
The VMM 1.0 based MIPI® DSI Verification IP (VIP) is compliant to the DSI MIPI Specification for Display Serial Interface Version 1.00 and DRAFT MIPI ...
568
0.0
MIPI® HSI VMM based Verification IP
The MIPI HSI VIP is an interface between an applications processor and cellular modem. It can be used to verify both Transmitter and/or Receiver of MI...
569
0.0
NVMe Verification IP
Non Volatile Memory Express, also known as NVMe is an interface specification built for accessing Solid State Drive (SSD) over PCIe. NVMe has revoluti...
570
0.0
NVMe VIP
Avery MVMe Test Environment Solution provides comprehensive verification featuring an advanced UVM environment that incorporates constrained random tr...
571
0.0
Open Core Protocol (OCP) Verification IP
OCP : Asiczen Technologies has its IP verification for OCP (Open core protocol). OCP is one of the system Bus protocol verification IP. The system bus...
572
0.0
PCI Express Verification Component
The PCI Express eVC can be used for verification of a device that supports the PCI Express standard. The eVC is compliant to PCI Express Base Specific...
573
0.0
PCI-X Verification Component
eVCs are reusable Verification Components that can be used to establish ready-made verification environment. Each eVC is capable of acting as full ver...
574
0.0
PIPE 4.3 compliant PHY Verification IP
azPHY 1.0 is a perfect solution to verify high speed interface serdes IPs that support the high speed standards e.g. PCIe, USB and SATA. This VIP cons...
575
0.0
RAMTRON FM22L16 4Mbit F-RAM Memory VITAL Model
The VITAL FM22L16 behavioral model is fully compliant to RAMTRON FM22L16, 4Mbit F-RAM Memory, Rev, 1.2/Dec.2007 Specification. The FM22L16 is a 256Kx1...
576
0.0
RISC-V Base + Standard Extensions CPU Core Verification
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577
0.0
SDIO HOST VMM based Verification IP
The Secure Digital Input Output (SDIO) interface is a card interface defined to connect a SD Host Controller with four different types of cards, namel...
578
0.0
SH1636 SERDES Gigabit Ethernet Transceivers, VITAL Model
The VITAL SH1636 behavioral model is fully compliant to the SH1636 Gigabit Ethernet transceiver. The SH1636 is a single chip, Gigabit Ethernet transce...
579
0.0
Single/Multi Port USB Type-C Power Delivery Verification IP
SiliConch SCPD3013VIP is a configurable Multiport USB Type-C Power Delivery (PD) Verification IP that is based on the latest USB Power Delivery specif...
580
0.0
SONET Verification Component
The SONET eVC can be used for verification of any Synchronous Optical Network components like : Regenerator, Line Terminating Equipment (LTE), Section...
581
0.0
SPI-3 Link Layer eVerification Component
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582
0.0
SPI-3 PHY Layer eVerification Component
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583
0.0
ATMEL AT25DF161- SPI Serial Flash Memory VITAL Model
The VITAL AT25DF161 behavioral model is fully compliant to the 3687B-DFLASH-11/08 Specification of ATMEL, AT25DF161, 16-Megabit, SPI Serial Flash Memo...
584
0.0
Tensilica Processor Interface (PIF)® Verification IP
The VIP for PIF supports the e/Specman hardware verification language and the e Reuse Methodology (eRM). The eRM defines a coverage driven methodology...
585
0.0
UART (interface) eVC
The Universal Asynchronous Receiver Transmitter (UART) interface-level eVC is a powerful verification bundle built around the UART inteface industry s...
586
0.0
UART 16x50 eVC
The Universal Asynchronous Receiver Transmitter (UART) 16x50 device-level eVC is a powerful verification bundle built around the UART 16x50 class of d...
587
0.0
AXI3/AXI4 Verification IP
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588
0.0
UART eVC - Fully documented, of the shelf component for Verisity's Specmean Elite functional verification environment
Silicon Interfaces’ UART eVC is a fully documented, off the shelf component for Verisity’s Specman EliteTM functional verification environment. At the...
589
0.0
UART VMM based Verification IP
The VMM based UART VIP is complaint to National Semiconductor 16550 design. The UART interface allows a duplex, asynchronous, serial communication and...
590
0.0
USB 2.0 Function Controller OVA Checker IP
USB 2.0 Function Controller Checker OVA IP is fully documented, off the shelf component for the Developers of the USB 2.0 compliant Function Controlle...
591
0.0
USB 2.0 SystemVerilog Verification IP
USB 2.0 SVC can be configured as USB host, compound device or monitor. It provides protocol checking, transaction level monitoring and coverage. It ca...
592
0.0
USB 2.0 Vera RVM VIP - Fully documented, off the shelf component for the Verification of the USB 2.0 compliant Function Controller.
USB 2.0 Vera RVM VIP speeds up the verification process providing a compelling cost and time to market. This VIP is developed using the Synopsys’ Vera...
593
0.0
USB 2.0 VMM SystemVerilog Verification IP
Silicon Interfaces USB 2.0 VMM SystemVerilog VIP is fully documented, off the shelf component for the verification of the USB 2.0 compliant Function C...
594
0.0
Behavioral DS3 Generator and Analyzer Data Sheet
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595
0.0
USB Attached SCSI (UAS) + Bulk Only Transfer (BOT) VIP
UAS/BOT-Xactor is proven VIP enabling SoC and IP developers to perform comprehensive functional verification of their IP and SOCs incorporating USB At...
596
0.0
USB SuperSpeed+ 3.1, 3.0, Power Delivery 2.0, and 2.0/OTG VIP
USB-Xactor is a comprehensive VIP solution portfolio for USB SS+ 3.1 and 2.0 used by SoC and IP designers to ensure comprehensive SoC-level verificati...
597
0.0
Behavioral DS3 Over SONET Generator and Analyzer
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598
0.0
UVM Verification Solution for Serial Flash Memories
The purpose of HSV 900 is to provide reusable verification solution for serial flash memories (such as Spansion S25FL). The verification environment i...
599
0.0
Behavioral E3 Generator and Analyzer
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600
0.0
Behavioral E3 over SONET Generator and Analyzer
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