Design & Reuse
2715 IP
901
0.118
General Purpose IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process true 3.3V standard IO Cell Library....
902
0.3729
Low Power Ternary-CAM/Binary-CAM, supports process GP/LP
Specialty Memory Solutions...
903
0.118
General Purpose IO IP, 5V input tolerance, UMC 0.18um LL process
UMC 0.18um LL Logic process 5V tolerance standard IO Cell Library....
904
0.118
General Purpose IO IP, UMC 0.18um LL process
UMC 0.18um LL Logic process true 3.3V standard IO Cell Library....
905
0.118
General Purpose IO IP, 3.3V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process 3.3V tolerance standard IO Cell Library....
906
0.118
General Purpose IO IP, 5V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process 5V tolerance standard IO Cell Library....
907
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 2.5V standard IO Cell Library....
908
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 3.3V standard IO Cell Library....
909
0.118
General Purpose IO IP, 5V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process 5V tolerance standard IO Cell Library....
910
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 2.5V standard IO Cell Library....
911
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 3.3V standard IO Cell Library....
912
0.118
General Purpose IO IP, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 1.8V BOAC IO Cell Library....
913
0.3729
Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP
Memory Compilers...
914
0.118
General Purpose IO IP, UMC 28nm HPC process
UMC 28nm Logic and Mixed-Mode Low-K HPC process 1.8V BOAC IO Cell Library....
915
0.118
General Purpose IO IP, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process True 3.3V Generic IO Cell Library....
916
0.118
General Purpose IO IP, 5V tolerance, UMC 55nm SP process
UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate process 5V Tolerant BOAC IO Cell Library....
917
0.118
General Purpose Multi-Voltage IO IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process Multi-Voltage BOAC IO Cell Library....
918
0.118
General Purpose Multi-Voltage IO IP, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process Multi-Voltage BOAC IO Cell Library (with customized PU/PD function)....
919
0.118
General Purpose Multi-Voltage IO IP, With Power-on Control features, UMC 0.11um eFlash process
UMC 0.11um eFlash/EE2PROM Process BOAC Multi-Voltage IO with Power-on Tri-state/Low Function....
920
0.118
LVDS Receiver IP, 500Mbps, UMC 55nm LP process
LVDS RX IO PAD 500Mbps, UMC 55nm LP/RVT Low-K Logic process....
921
0.118
LVDS Tx IO IP, 1.25GHz, UMC 90nm SP process
Single Port LVDS Transmitter PAD 1.25Gbps, UMC 90nm SP/RVT Low-K process....
922
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), Support retention and deep sleep modes with built-in power gating circuitry., UMC 55nm LP process
UMC 55um LP Low-K process One Port Register File compiler....
923
0.118
One Port Register File Compiler IP, HJTC 0.18um pFlash process
HJTC 0.18um pFlash process synchronous Single Port Register File memory compiler....
924
0.3729
Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP
Memory Compilers...
925
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
926
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, One Port Register File memory compiler....
927
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Single Port Register File memory compiler....
928
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um LL/FSG process synchronous Single Port Register File SRAM memory compiler....
929
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/LL fusion (FSG) process high density synchronous Single Port Register File SRAM memory compiler....
930
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process synchronous Single Port Register File SRAM memory compiler....
931
0.118
One Port Register File Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous Single Port Register File SRAM memory compiler....
932
0.118
One Port Register File Compiler IP, UMC 0.13um SP process
UMC 0.13-micron 1.2V high speed (HS) Logic process synchronous Low Power Single Port Register File SRAM compiler....
933
0.118
One Port Register File Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous Single Port Register File SRAM memory compiler....
934
0.118
One Port Register File Compiler IP, UMC 0.18um LL process
UMC 0.18um LL Logic process synchronous Single Port Register File SRAM memory compiler....
935
0.3729
Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP
Memory Compilers...
936
0.118
One Port Register File Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Single Port Register File SRAM memory compiler....
937
0.118
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/UHS One Port Register File compiler with peripheral LVT....
938
0.118
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K One Port Register File....
939
0.118
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process One Port Register File with LVT....
940
0.118
One Port Register File Compiler IP, UMC 28nm SP process
UMC 28nm Logic process synchronous Ultra high speed Single Port Register File SRAM memory compiler....
941
0.118
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/retention/Nap mode feature....
942
0.118
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/Retention/Nap mode & peripheral LVT feature....
943
0.118
One Port Register File Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash One Port Register File with Power Gating....
944
0.118
One Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm Logic standard performance process synchronous high density Single Port Register File SRAM memory compiler....
945
0.118
One Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT low_K Logic process synchronous One Port Register File....
946
0.3729
Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP
Memory Compilers...
947
0.118
ROM Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.110um eFlash HS process Via1 ROM compiler....
948
0.118
ROM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process synchronous via-1 ROM memory compiler....
949
0.118
ROM Compiler IP, UMC 0.11um LL process
UMC 0.11um LL process synchronous Via-1 ROM memory compiler....
950
0.118
ROM Compiler IP, UMC 0.11um SP process
UMC 0.11um high speed Logic process synchronous Via-1 ROM memory compiler....