1001 3.0

Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k Foundry sponsored - Single Port Register File compiler - TSMC 90 nm uLL - high density - Dual Voltage - compiler range up to 40 k...

1002 0.3729

Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process GC Memory Compilers...

1003 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LMINUS (C30 RVT)....

1004 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LPLUS (C38)....

1005 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library (C35)....

1006 0.118

Standard Cell (ECO) Library IP, RVT, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process ECO_M1 Core Cell Library....

1007 0.118

Standard Cell (ECO) Library IP, RVT, UMC 65nm SP process metal-1 start Gate Array ECO Library for UMC 65nm SP/RVT(FSE0A_D)....

1008 0.118

Standard Cell (Generic) Library IP, 9 tracks, UMC 0.162um eFlash/LL process UMC 0.162um eFlash/LL 9-Track Generic Core Cell Library....

1009 0.118

Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Cell Library with LMINUS (C30 HVT)....

1010 0.118

Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library with LPLUS (C38)....

1011 0.118

Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library C30....

1012 0.118

Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library C35....

1013 0.3729

Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GC Memory Compilers...

1014 0.118

Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library C40....

1015 0.118

Standard Cell (Generic) Library IP, HVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic process 9-Track Generic Core Cell Library....

1016 0.118

Standard Cell (Generic) Library IP, HVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic process 9-Track Generic Core Cell Library (C38)....

1017 0.118

Standard Cell (Generic) Library IP, 10-track, HVT, UMC 90nm SP process UMC 90nm Low-K SP/HVT Standard Core Cell Library....

1018 0.118

Standard Cell (Generic) Library IP, LVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 12-Track Standard Generic Core Cell Library (C30)....

1019 0.118

Standard Cell (Generic) Library IP, LVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C30)....

1020 0.118

Standard Cell (Generic) Library IP, LVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C35)....

1021 0.118

Standard Cell (Generic) Library IP, LVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C40)....

1022 0.118

Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 9-Track Standard Generic Core Cell Library (C35)....

1023 0.118

Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 9-Track Standard Generic Core Cell Library (C30)....

1024 0.3729

MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, supports process GC Memory Compilers...

1025 0.118

Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 9-Track Standard Generic Core Cell Library (C38)....

1026 0.118

Standard Cell (Generic) Library IP, LVT, UMC 40nm LP process UMC 40nm LP/LVT Low-K Logic process Standard Cell Library....

1027 0.118

Standard Cell (Generic) Library IP, RTC Cell, HJTC 0.18um eFlash/G2 process HJ 0.18um eFlash process RTC Standard Cell Library....

1028 0.118

Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic process 12-Track Standard Generic Core Cell Library (C30)....

1029 0.118

Standard Cell (Generic) Library IP, RVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C30)....

1030 0.118

Standard Cell (Generic) Library IP, RVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C35)....

1031 0.118

Standard Cell (Generic) Library IP, RVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C40)....

1032 0.118

Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic process 9-Track Standard Generic Core Cell Library (C30)....

1033 0.118

Standard Cell (Generic) Library IP, RVT, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process Standard Cell Library....

1034 0.118

Standard Cell (Generic) Library IP, RVT, UMC 90nm LL process UMC 90nm LL Logic Low-K RVT process standard Core Cell Library....

1035 0.3729

Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, supports process GC Memory Compilers...

1036 0.118

Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process UMC 0.13um HS/FSG Logic process high performance Core Cell Library....

1037 0.118

Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process UMC 0.13um HS/FSG Logic process high density Core Cell Library....

1038 0.118

Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process UMC 0.13um HS/FSG Logic process mask programmable cell array with body E Core Cell Library....

1039 0.118

Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process UMC 0.13um HS/FSG Logic process metal programmable (M3/M4/M5) cell array standard Core Cell Library....

1040 0.118

Standard Cell (Generic) Library IP, UMC 0.13um LL process UMC 0.13um LL Logic/FSG process high density Core Cell Library....

1041 0.118

Standard Cell (Generic) Library IP, UMC 0.13um LL process UMC 0.13um LL FSG process high density Generic Core Cell Library....

1042 0.118

Standard Cell (Generic) Library IP, UMC 0.13um LL process UMC 0.13um LL process, standard Cell Library....

1043 0.118

Standard Cell (Generic) Library IP, UMC 0.13um LL process UMC 0.13um LL Logic/FSG process mask programmable cell array with body E Core Cell Library....

1044 0.118

Standard Cell (Generic) Library IP, UMC 0.13um LL/FSG process UMC 0.13um LL Logic(FSG) process metal programmable (M3/M4/M5) cell array standard Core Cell Library....

1045 0.118

Standard Cell (Generic) Library IP, UMC 0.13um SP process UMC 0.13um SP/FSG Logic process mask programmable cell array with body E Core Cell Library....

1046 0.3729

One Port Register File (1 Port RF) Compiler with Column Redundancy Option, supports process GC Memory Compilers...

1047 0.118

Standard Cell (Generic) Library IP, UMC 0.13um SP process UMC 0.13um Logic high speed(FSG) process, Metal programmable(M3/M4/M5) cell array Core Cell Library....

1048 0.118

Standard Cell (Generic) Library IP, UMC 0.15um SP process UMC 0.15um SP Logic process mask programmable cell array with body E Core Cell Library....

1049 0.118

Standard Cell (Generic) Library IP, UMC 0.18um G2 process UMC 0.18um GII Logic process mask programmable cell array with body E Core Cell Library....

1050 0.118

Standard Cell (Generic) Library IP, UMC 0.18um G2 process UMC 0.18um GII Logic process standard Core Cell Library....