Design & Reuse
2715 IP
1451
0.118
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell...
1452
0.118
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell.
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell....
1453
0.118
UMC 55nm ULP/uHVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90) w/ Forward Bias. W/ deep Nwell.
UMC 55nm ULP/uHVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90) w/ Forward Bias. W/ deep Nwell....
1454
0.118
UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library
UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library...
1455
0.118
UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library
UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library...
1456
0.118
UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)
UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)...
1457
0.0
512x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V CMOS 18B Process,Using 5V devices only
The ATO00512X1MX180LB52ND is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in MXI- 0.18μm ...
1458
0.118
UMC 0.13um LL/FSG Logic Process Metal1 Start ECO core cell library
UMC 0.13um LL/FSG Logic Process Metal1 Start ECO core cell library...
1459
0.118
UMC 90nm SP/RVT LowK Logic Process ECO M1 core cell library
UMC 90nm SP/RVT LowK Logic Process ECO M1 core cell library...
1460
0.118
UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library...
1461
0.118
UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library
UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library...
1462
0.118
UMC 55nm eFlash/RVT Logic Process 7-track ECO_M1 cell library
UMC 55nm eFlash/RVT Logic Process 7-track ECO_M1 cell library...
1463
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1464
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1465
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1466
0.118
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library...
1467
0.118
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library...
1468
0.0
1x64 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm Mixed-Signal 1.8V/3.3V Process
The AT1X64T180MM0AB is organized as one by 64 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- Mixed-Signal ...
1469
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track eco_m1 cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track eco_m1 cell library...
1470
0.118
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...
1471
0.118
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...
1472
0.118
UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library
UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library...
1473
0.118
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90). W/O deep Nwell.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90). W/O deep Nwell....
1474
0.118
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)...
1475
0.118
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60) w/ Forward Bias. W/ deep Nwell
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60) w/ Forward Bias. W/ deep Nwell...
1476
0.118
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias. W/ deep Nwell
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias. W/ deep Nwell...
1477
0.118
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)...
1478
0.118
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)...
1479
10.0
4Kx32 Bits OTP (One-Time Programmable) IP, TSM- 40nm ULP 1.1V/2.5V Process
The AT4K32T40ULP7ZC is organized as 4K-bits by 32 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP stand...
1480
0.118
UMC 55nm ULP/uHVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias. W/ deep Nwell.
UMC 55nm ULP/uHVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias. W/ deep Nwell....
1481
0.118
UMC 40nm LP/HVT Logic Process SYNS-like 9T ECO_M1 Cell Library
UMC 40nm LP/HVT Logic Process SYNS-like 9T ECO_M1 Cell Library...
1482
0.118
UMC 40nm LP/LVT Logic Process SYNS-like 9T ECO_M1 Cell Library
UMC 40nm LP/LVT Logic Process SYNS-like 9T ECO_M1 Cell Library...
1483
0.118
UMC 40nm LP/RVT Logic Process SYNS-like 9T ECO_M1 Cell Library
UMC 40nm LP/RVT Logic Process SYNS-like 9T ECO_M1 Cell Library...
1484
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
1485
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
1486
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
1487
0.118
UMC 28nm HPM/HVT Logic Process 9-track Standard ECO_M1 cell library (C35)
UMC 28nm HPM/HVT Logic Process 9-track Standard ECO_M1 cell library (C35)...
1488
0.118
UMC 28nm HPM/HVT Logic Process 9-track Standard cell ECO_M1 CORE library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard cell ECO_M1 CORE library (C38)...
1489
0.118
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)...
1490
2.0
RF I/O Pad Set and Discrete RF ESD Protection Components
The RF library include analog signal pads and ESD protection components for RF applications. This library is offered as a supplement to the IO librar...
1491
0.118
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)...
1492
0.118
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)...
1493
0.118
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)...
1494
0.118
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)...
1495
0.118
UMC 0.18um GII Logic Process 3.3V core cell library
UMC 0.18um GII Logic Process 3.3V core cell library...
1496
0.118
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library...
1497
0.118
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library...
1498
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
1499
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...
1500
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...