1851 0.118

UMC 28nm HPC process synchronous HVT periphery high density single port SRAM memory compiler. UMC 28nm HPC process synchronous HVT periphery high density single port SRAM memory compiler....

1852 0.118

UMC 28nm HPC process synchronous LVT periphery high density single port SRAM memory compiler. UMC 28nm HPC process synchronous LVT periphery high density single port SRAM memory compiler....

1853 0.118

UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler...

1854 0.118

UMC 28HPC 1PRF compiler with HVT peripheral UMC 28HPC 1PRF compiler with HVT peripheral...

1855 0.118

UMC 28HPC process 1PRF compiler with LVT peripheral UMC 28HPC process 1PRF compiler with LVT peripheral...

1856 0.118

UMC 28nm HPC process standard synchronous high density dual port SRAM memory compiler. UMC 28nm HPC process standard synchronous high density dual port SRAM memory compiler....

1857 2.0

RGMII IO Pad Set The (R)GMII / SMII Combo library provides the driver / receiver cell for GMII, RGMII, and SMII signaling along with a full complement of I/O power, co...

1858 0.118

UMC 28HPC process standard synchronous high density dual port SRAM memory compiler. UMC 28HPC process standard synchronous high density dual port SRAM memory compiler....

1859 0.118

UMC 28nm HPC Logic process PG One Port Register File UMC 28nm HPC Logic process PG One Port Register File...

1860 0.118

UMC 28nm HPC Logic process PG-One Port Register File with HVT UMC 28nm HPC Logic process PG-One Port Register File with HVT...

1861 0.118

UMC 28nm HPC Logic process PG One Port Register File with LVT UMC 28nm HPC Logic process PG One Port Register File with LVT...

1862 0.118

UMC 28nm HPC process PG Two Port Register File UMC 28nm HPC process PG Two Port Register File...

1863 0.118

UMC 28nm HPC process 2PRF with Bank2 & power gating UMC 28nm HPC process 2PRF with Bank2 & power gating...

1864 0.118

UMC 28nm HPC process PG-2PRF with Bank4 UMC 28nm HPC process PG-2PRF with Bank4...

1865 0.118

UMC 28nm HPC process PG Two Port Register File with peri-HVT UMC 28nm HPC process PG Two Port Register File with peri-HVT...

1866 0.118

UMC 28nm HPC process 2PRF, HVT & Bank2 UMC 28nm HPC process 2PRF, HVT & Bank2...

1867 0.118

UMC 28nm HPC process PG-2PRF with HVT Bank4 UMC 28nm HPC process PG-2PRF with HVT Bank4...

1868 2.0

subLVDS IO Pad Set The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...

1869 0.118

UMC 28nm HPC process PG Two Port Register File with peri-LVT UMC 28nm HPC process PG Two Port Register File with peri-LVT...

1870 0.118

UMC 28nm HPC process 2PRF with LVT and Bank 2 UMC 28nm HPC process 2PRF with LVT and Bank 2...

1871 0.118

UMC 28nm HPC process PG-2PRF with LVT and Bank 2 UMC 28nm HPC process PG-2PRF with LVT and Bank 2...

1872 0.118

28nm HPM 1PRF with peri -LVT 28nm HPM 1PRF with peri -LVT...

1873 0.118

UMC 0.162um eFalsh/LL Single-Port SRAM memory compiler _x005F_x005F_x005F_x005F_x005F_x000D_ UMC 0.162um eFalsh/LL Single-Port SRAM memory compiler...

1874 0.118

UMC 0.162um eFalsh/LL One Port Register File_x005F_x005F_x005F_x005F_x005F_x000D_ memory compiler UMC 0.162um eFalsh/LL One Port Register File memory compiler...

1875 0.118

110nm BCD process Synchronous High-Density Single-Port SRAM Compiler 110nm BCD process Synchronous High-Density Single-Port SRAM Compiler...

1876 0.118

UMC 0.11um BCD process;Single-Port SRAM compiler UMC 0.11um BCD process;Single-Port SRAM compiler...

1877 0.118

UMC 0.11um BCD High Voltage Process Synchronous Via1 Programmable ROM Compiler UMC 0.11um BCD High Voltage Process Synchronous Via1 Programmable ROM Compiler...

1878 0.118

UMC 0.11um eFlash LL process ULL High Density Single-Port SRAM UMC 0.11um eFlash LL process ULL High Density Single-Port SRAM...

1879 2.0

3.3V Wide-Range General Purpose Staggered I/O Pad Set The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...

1880 0.118

UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler. UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler....

1881 0.118

HJTC 0.11um uLL/pFlash via1 ROM memory compiler. HJTC 0.11um uLL/pFlash via1 ROM memory compiler....

1882 0.118

HJTC 0.11um uLL/pFlash Single Port SRAM compiler HJTC 0.11um uLL/pFlash Single Port SRAM compiler...

1883 0.118

HJTC 0.11um pflash process standard synchronous high density single port SRAM memory compiler. HJTC 0.11um pflash process standard synchronous high density single port SRAM memory compiler....

1884 0.118

UMC 80nm HV Process PG Single-Port SRAM Memory Compiler_x005F_x005F_x005F_x005F_x005F_x000D_ UMC 80nm HV Process PG Single-Port SRAM Memory Compiler...

1885 0.118

UMC 80nm HV Process Single-Port SRAM Memory Compiler with redundancy UMC 80nm HV Process Single-Port SRAM Memory Compiler with redundancy...

1886 0.118

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler. UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler....

1887 0.118

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler. UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler....

1888 0.118

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy. UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy....

1889 0.118

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler. UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler....

1890 2.0

HSTL I/O Pad Set The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and differential signalin...

1891 0.118

Global Foundries 55nm LowPower LowK Process synchronous high density low power single port SRAM memory compiler. Global Foundries 55nm LowPower LowK Process synchronous high density low power single port SRAM memory compiler....

1892 0.118

Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler. Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler....

1893 0.118

Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler. Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler....

1894 0.118

Global Foundries 55nm LowPower LowK Process synchronous high density low power dual port SRAM memory compiler. Global Foundries 55nm LowPower LowK Process synchronous high density low power dual port SRAM memory compiler....

1895 0.118

Global Foundries 55nm LowPower LowK Process synchronous high density low power dual port SRAM memory compiler. Global Foundries 55nm LowPower LowK Process synchronous high density low power dual port SRAM memory compiler....

1896 0.118

28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V 28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V...

1897 0.118

Ultra High Speed 1-Port Register File, 6TSRAM, Peri LVT/RVT UMC 28nm Logic and Mixed-Mode High Performance Process Synchronous HVT+RVT Periphery Ultra-High-Speed One-Port Register File Compiler...

1898 15.0

Dual-Rail SRAM Globalfoundries 22FDX Ultra-low voltage logic designs utilizing adaptive body biasing demand for dense SRAM solutions which fully integrates in the ABB aware implementation...

1899 15.0

Standard Cell Libraries - GLOBALFOUNDRIES 22FDX Body biasing is a disruptive 22FDX® feature which enables the adaption of transistor threshold voltages after production during device operation. Racy...

1900 5.0

IO Library - GLOBALFOUNDRIES 22FDX The general purpose 22FDX® IO Library features a rich set of digital and analog IO cells covering 1.2 V to 1.8 V I/O standards and 0.4 V to 0.8 V core...