4251 0.0

TSMC CLN28HPCLVT 28nm Clock Generator PLL - 880MHz-4400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4252 0.0

TSMC CLN28HPCLVT 28nm Clock Generator PLL - 440MHz-2200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4253 0.0

TSMC CLN28HPCLVT 28nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4254 0.0

GF L55LPX 55nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4255 0.0

GF L55LPX 55nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4256 0.0

GF L55LPX 55nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4257 8.0

IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL IGAPLLV09 PLL-based clock generating IP integrates a voltage-controlled oscillator, a phase frequency detector, a charge pump, a loop filter, and thre...

4258 0.0

TSMC CLN7FF 7nm DDR DLL - 395MHz-1975MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4259 100.0

TSMC CLN7FF 7nm DDR DLL - 250MHz-1250MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4260 0.0

TSMC CLN7FF 7nm DDR DLL - 188MHz-940MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4261 0.0

TSMC CLN7FFLVT 7nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4262 100.0

TSMC CLN7FFLVT 7nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4263 0.0

TSMC CLN7FFLVT 7nm DDR DLL - 270MHz-1350MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4264 0.0

TSMC CLN16FFCLLLVT 16nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4265 0.0

TSMC CLN16FFCLLLVT 16nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4266 0.0

TSMC CLN16FFCLLLVT 16nm DDR DLL - 270MHz-1350MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4267 0.0

TSMC CLN16FF+LLLVT 16nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4268 8.0

IGAPLLV10A, TSMC CLN12FFC Spread Spectrum Clock Generate Phase Lock Loop IGAPLLV10A is a Spread Spectrum Phase Lock Loop (SSPLL), without external components and is designed to provide stable and accurate clock. The SSPLL i...

4269 0.0

TSMC CLN16FF+LLLVT 16nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4270 0.0

TSMC CLN16FF+LLLVT 16nm DDR DLL - 270MHz-1350MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4271 0.0

TSMC CLN16FF+GLLVT 16nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4272 0.0

TSMC CLN16FF+GLLVT 16nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4273 0.0

TSMC CLN16FF+GLLVT 16nm DDR DLL - 270MHz-1350MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4274 0.0

TSMC CLN28HPC+LVT 28nm DDR DLL - 411MHz-2055MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4275 0.0

TSMC CLN28HPC+LVT 28nm DDR DLL - 260MHz-1300MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4276 0.0

TSMC CLN28HPC+LVT 28nm DDR DLL - 195MHz-975MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4277 0.0

TSMC CLN28HPCLVT 28nm DDR DLL - 379MHz-1895MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4278 0.0

Process/Voltage/Temperature Sensor (Supply voltage 1.8V/0.9V) 028UMC_PVT_01 IP library is a unique solution intended to continuously monitor IC status at several on-die locations. It is able to detect manufactu...

4279 8.0

IGARFCS05A, TSMC CLN40LP 120MHz Resistance to Frequency Converter IGARFCS05A is a 120MHz resistance to frequency oscillator without external component. It is designed to provide a stable and accurate reference clock ...

4280 0.0

TSMC CLN28HPCLVT 28nm DDR DLL - 240MHz-1200MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4281 0.0

TSMC CLN28HPCLVT 28nm DDR DLL - 180MHz-900MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4282 0.0

GF L55LPX 55nm DDR DLL - 164MHz-820MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4283 0.0

GF L55LPX 55nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4284 3.0

Active Programmable Low Pass Filter The WEA321250LPF25CH5ST55 is an active 5th order Chebyshev Low Pass filter, synthesized in a Leapfrog architecture. It has programmable cutoff frequen...

4285 0.0

GF L55LPX 55nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4286 0.0

TSMC CLN7FF 7nm Deskew PLL - 800MHz-4000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4287 30.0

TSMC CLN7FF 7nm Deskew PLL - 400MHz-2000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4288 0.0

TSMC CLN7FF 7nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4289 0.0

TSMC CLN7FFLVT 7nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4290 8.0

IGATHMX01A, TSMC CLN7FF Thermal Sensor ADC IGATHMX01A is a voltage/temperature sensor ADC which builds in internal thermal diode and Analog-to-Digital Converter (ADC) for both voltage and tempe...

4291 0.0

TSMC CLN7FFLVT 7nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4292 100.0

TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4293 0.0

TSMC CLN16FFCLLLVT 16nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4294 0.0

TSMC CLN16FFCLLLVT 16nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4295 0.0

TSMC CLN16FFCLLLVT 16nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4296 0.0

TSMC CLN16FF+LLLVT 16nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4297 0.0

TSMC CLN16FF+LLLVT 16nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4298 0.0

TSMC CLN16FF+LLLVT 16nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4299 0.0

TSMC CLN16FF+GLLVT 16nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4300 0.0

TSMC CLN16FF+GLLVT 16nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...