Design & Reuse
896 IP
51
0.0
GDDR3 Controller IP
GDDR3 interface provides full support for the GDDR3 interface, compatible with GDDR3 specification and DFI-version 4.0 or 5.0 Specification Compliant....
52
0.0
GDDR3L Controller IP
GDDR3L interface provides full support for the GDDR3L interface, compatible with GDDR3L specification and DFI-version 4.0 or 5.0 Specification Complia...
53
0.0
GDDR4 Controller IP
GDDR4 interface provides full support for the GDDR4 interface, compatible with GDDR4Spec_rev_04 specification and DFI-version 4.0 or 5.0 Specification...
54
0.0
GDDR5 Controller IP
GDDR5 interface provides full support for the GDDR5 interface, compatible with standard JESD212C specification and DFI-version 4.0 or 5.0 Specificatio...
55
0.0
GDDR5X Controller IP
GDDR5X interface provides full support for the GDDR5X interface, compatible with standard JESD232 and JESD232A specification and DFI-version 4.0 or 5....
56
0.0
HBM2E Controller IP
HBM2E is full-featured, easy-to-use, synthesizable design, compatible with HBM2E JESD235B and JESD235C with revision 4.10 specification and DFI-versio...
57
0.0
HBM3 Controller IP
HBM3 interface provides full support for the HBM3 interface, compatible with draft JEDEC specification version 0.93 and DFI-version 4.0 or 5.0 specifi...
58
10.0
HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard
Synopsys HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard. The controller interoperates wit...
59
0.0
LPDDR5X Controller IP
LPDDR5X is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5X draft JEDEC specification and DFI-version 5.0 specification Compl...
60
0.0
GDDR6X Controller IP
GDDR6X interface provides full support for the GDDR6X interface, compatible with GDDR6X protocol draft specification and DFI-version 4.0 or 5.0 Specif...
61
3.0
1.8V/3.3V Switchable GPIO With 5V I2C Open Drain & Analog in 16nm
16nm & 12nm Flip-Chip IO library with dynamically switchable 1.8V/3.3V GPIO, 5V I2C / SMBUS open-drain cell, 5V OTP cell, 1.8V & 3.3V analog cells, an...
62
0.0
HBM Memory Controller
Produced by DRAM manufacturers such as Samsung and Micron, High Bandwidth Memory or HBM, provides users with high bandwidth, low power consumption and...
63
1.0
MCR DDR5 PHY
The INNOSILICON DDR Mixed-Signal MCR DDR5 PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible MCR DDR5 DIMM...
64
0.0
TSMC CLN7FF 7nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
65
4.0
NVMe Target IP Core
The IntelliProp IPC-NV163A-DT NVMe Target IP core allows companies to build high speed NVMe based storage products. The IPC-NV163A-DT provides a hardw...
66
4.0
NVMe-to-NVMe Bridge
The IntelliProp IPC-NV171B-BR NVMe Bridge utilizes the IntelliProp NVMe Host Accelerator Core and the IntelliProp NVMe Target Core to create an NVMe p...
67
4.0
NVMe Host Accelerator
The IntelliProp IPC-NV164A-HI NVMe Host Accelerator IP Core provides a simplified, high-bandwidth interface to industry standard NVMe storage devices....
68
2.0
Kintex Ultra Scale Plus NVMe Host IP
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The LDS NVME HOST IP provides two interfaces : * On...
69
200.0
ReRAM NVM in 130nm CMOS, S130
Weebit ReRAM (Resistive Random Access Memory), is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. R...
70
0.0
NAND flash Controller using Altera PHY Lite
IP-Maker's Universal NAND Flash Controller (UNFC) IP core is designed specifically to enable commodity Flash memory to be effectively used in enterpri...
71
30.0
High Performance NVMe for PCIe-based storage
Typical storage controllers are composed of a communication interface and a Nandflash controller. In this case, all the data flow is managed by the ex...
72
0.0
NAND Flash Controller using Xilinx RX/TX Bit Slice
IP-Maker's Universal NAND Flash Controller (UNFC) IP core is designed specifically to enable commodity Flash memory to be effectively used in enterpri...
73
28.0
LPDDR4x/5 Secondary/Slave (memory side!) PHY
This LPDDR4/4X/5 PHY is a memory-side interface IP normally found implemented within commodity DRAM products. Green Mountain Semiconductor's LPDDR4X/L...
74
1.0
GDDR6X/6 Combo PHY&Controller
Innosilicon GDDR6/6X Combo IP is fully compliant to the JEDEC GDDR6/6X standard, supporting up to 16Gbps per pin for PAM2 GDDR6 and 21Gbps for PAM4 GD...
75
25.0
Quad-SPI FLASH Controller AHB
The Veriest Serial Flash Controller Design IP offers a rich set of features to facilitate easy access to Serial Flash devices. The CPU can boot direc...
76
2.0
Parallel FLASH Memory Controller
JEDEC® compliant FLASH memory controller ideal for interfacing to a wide range of parallel FLASH memory components such as the popular SST39 series fr...
77
50.0
High Performance DDR5/4/3 Memory Controller
Mobiveil's DDR5/4/3 Memory Controller is a highly flexible and configurable design targeted for high performance enterprise server and real-time consu...
78
10.0
Universal Multiport Memory Controller - LPDDR 3/2 Controller
Mobiveil's UMMC LPDDR3/2 Controller is a highly flexible and configurable design. It is targeted for high bandwidth access and low power consumption s...
79
50.0
Hyperbus Flash Memory Controller
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. At the same time, the pin-count requir...
80
0.0
Cache controller for fast NVM memories access and very low power consumption
R-Stratus-LP is THE new generation of cache controller for MCU applications whenever the application program is stored in a Non Volatile Memories (NVM...
81
80.0
ONFI Flash Controller
Mobiveil’s Enterprise Flash Controller (EFC) is a highly flexible and configurable design targeted for enterprise storage applications like SSD. The E...
82
80.0
OCTA SPI PSRAM Controller
THis controller supports Xccela open standard bus for digital interconnect and data communications suitable for Volatile and nonvolatile memories such...
83
80.0
xSPI NOR Flash controller
xSPI-NFC is JEDEC xSPI compliant NOR Flash controller IP supporting devices from various vendors with XIP and Auto-boot support. The IP also has Conti...
84
0.0
DDR 4/3 Memory Controller IP - 2400MHz
This memory controller supports DDR3/4 SDRAM. DDR3/4 memory controller is a high-speed interface used for data read/write between internal engine and ...
85
0.0
ONFI 4.1 PHY IP (Silicon Proven in TSMC 12FFC)
ONFI PHY block is used to either transmit signal and data to NAND Flash interface or receive the data from NAND Flash by Flash controller IP. MDLL set...
86
0.0
SD 5.1 / eMMC 5.1 Host Controller IP
Our Host IP is specially designed to combo both SD eMMC features. SD feature: The Secure Digital (SD) Card, supports SD5.1 and later specifications...
87
0.0
DDR3/ DDR3L Combo PHY IP - 1600Mbps (Silicon Proven in UMC 40LP)
This DDR PHY IP(Double Data Rate) supports DRAM type DDR3, DDR3L this PHY provides low latency, and enables up to 1600Mbps throughput. The DDR IP is c...
88
0.0
DDR3L/ LPDDR4/ DDR4 PHY IP - 1866Mbps (Silicon Proven in UMC 28HPC+)
The DDR3L/ DDR4/ LPDDR4 Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the UMC 28HPC+ p...
89
0.0
DDR4/ DDR3/ DDR3L Combo PHY IP - 1600Mpbs (Silicon Proven in TSMC 28HPC+)
This DDR (Double Data Rate) PHY IP supports DDR3/DDR3L/DDR4, provides low latency, and enables up to 1600Mbps throughput. The PHY IP is silicon proven...
90
0.0
DDR4/ DDR3 Combo PHY IP - 2400Mbps (Silicon Proven in UMC 28HPC+)
The DDR4/3 PHY is compatible with JEDEC DDR3 and JEDEC DDR4 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to 2133Mbps and DDR4 DRAM speeds...
91
0.0
Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption
R-Stratus-LPRR is THE new generation of cache controller for MCU applications whenever the application program is stored in a Non Volatile Memories (N...
92
0.0
DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency. The Controller IP is silicon proven and connects to DD...
93
0.0
DDR3/ DDR2 Combo PHY IP - 1866Mbps (Silicon Proven in UMC 40LP)
The DDR3/2 PHY is compatible with JEDEC DDR3 and JEDEC DDR2 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to1866Mbps and DDR2 DRAM speeds ...
94
0.0
High Performance DDR 3/2 Memory Controller IP
This memory controller supports DDR2/3 SDRAM. DDR2/3 memory controller is a high-speed interface used for data read/write between internal engine and ...
95
0.0
1st Generation Software Defined Radio RF IP
This is the 1st Generation SDR RF IP that supports 1x2 and support the frequency ranging from 300MHz to 2.8 GHz with a support of up to 40MHz Bandwidt...
96
0.0
2nd Generation Software Defined Radio RF IP
This is the 2nd Generation SDR RF IP that supports 2x2 and support the frequency ranging from 100MHz to 3.8 GHz with a support of up to 120MHz Bandwid...
97
0.0
ONFi PHY 4.0 (FPHY+MDLL+SDLL Regulator) (Silicon Proven in TSMC 28HPC+)
ONFI PHY block is used to either transmit signal and data to NAND Flash interface, or receive the data from NAND Flash by Flash controller IP. MDLL se...
98
0.0
DDR4/ LPDDR4/ DDR3L PHY IP - 3200Mbps (Silicon Proven in TSMC 12FFC)
The DDR4/ DDR3L/ LPDDR4 Combo PHY IP provides low latency and enables up to 3200Mbps throughput. The PHY IP is compliant with the latest JEDEC standar...
99
0.0
DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
100
0.0
3rd Generation Software Defined Radio RF IP
This is the 3rd Generation SDR RF IP that supports 1x1 and a frequency ranging from 100MHz to 2.6 GHz, which is currently in TSMC 40nm. The SDR Gen.3 ...