Design & Reuse
896 IP
101
0.0
4th Generation Software Defined Radio RF IP
This is the 4th Generation SDR RF IP that would support 2x2 and a frequency ranging from 200MHz to 7.3GHz with a support of up to 120MHz Bandwidth. Th...
102
20.0
112Gbps Serdes USR & XSR
With sophisticated architecture and advanced technology, KNL multi-mode D2D transceiver IP with PMA and PCS layer is designed for low power and high p...
103
50.0
DDR5/DDR4/LPDDR5 Combo PHY IP - 4800Mbps (Silicon Proven in TSMC 12FFC)
The DDR PHY IP supports DDR5/ DDR4/ LPDDR5, provides low latency, and enables up to 5400MT/s throughput. PHY functionality is verified in NC-Verilog s...
104
0.118
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process 1.41um2 Cell Single Port SRAM compiler....
105
0.118
Single Port SRAM Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process Single Port SRAM compiler with 141-Bit cell....
106
0.118
Single Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash Single Port SRAM....
107
0.118
Single Port SRAM Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE Logic process Synchronous Single Port SRAM memory compiler with 1.41um2-Bit cell....
108
0.118
Single Port SRAM Compiler IP, UMC 0.11um HV process
UMC 0.11um HV process 1.35um2 Single Port SRAM compiler....
109
0.118
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous, UMC 0.18um eFlash/G2 process
UMC 0.18um eFlash process GII 4.0um2 Single Port SRAM compiler....
110
0.118
Single Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um LL process
UMC 0.18um Logic process high density, Low Power, mini area, Single Port SRAM compiler....
111
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303HVT cell peripheral LVT....
112
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Ultra high speed Single Port SRAM memory compiler with Redundancy....
113
14.0
DDR34/LPDDR23 PHY - 40LL
B40LLDDRPHY-D34LP23 IP is compliant to JESD79-3F(DDR3), JESD79-4A(DDR4), JESD209-2F(LPDDR2), JESD209-3B(LPDDR3),DFI3.1 specification and delivers an u...
114
2.0
NVMe Host Recorder on Mini-ITX Zynq 7
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The register file interface simplify the manag...
115
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/HVT Logic process with 6TSRAM (0.242 mm2) Single Port SRAM memory compiler....
116
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler with LVT peripheral....
117
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM memory compiler with row redundancy....
118
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler LVT with row redundancy....
119
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303RVT cell peripheral LVT....
120
0.118
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT....
121
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM memory compiler with row Redundancy....
122
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV Low Power Low-K process synchronous high density, Single Port SRAM compiler with row redundancy option....
123
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler....
124
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler with redundancy feature....
125
2.0
Polarfire NVMe Host Recorder
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The register file interface simplify the manag...
126
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler....
127
0.118
Single Port SRAM Compiler IP, HVT, Support Repair Features, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor Single Port SRAM with peripheral HVT and row redundancy....
128
0.118
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM compiler....
129
0.118
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm HV Single Port SRAM with peripheral LVT....
130
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler....
131
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55SP Single Port SRAM with row redundancy....
132
0.118
Single Port SRAM Compiler IP, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler....
133
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler with Redundancy....
134
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler....
135
0.118
Single Port SRAM Compiler IP, UMC 90nm CIS process
UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler....
136
2.0
Polarfire SoC NVMe Host
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The register file interface simplify the manag...
137
0.118
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm CIS process
Single Port SRAM, UMC 90nm CMOS Image Sensor Image Sensor process....
138
0.118
Flash Memory Controller IP, Support page sizes of 512, 2K, 4K, 8K and 16K bytes NAND Flash memory, 74bit ECC correction (512 or 1K bytes sectors), Soft IP
Nand Flash Controller with AHB Interface over 74-Bit ECC correction capacity....
139
0.118
Controller IP, System Power/Clock Management, Soft IP
The system control unit, is designed to provide a power and clock management functions for System-on-a-Chip (SoC) to handle operations of the chip tha...
140
0.118
Single Port SRAM Compiler IP, High density, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process high density synchronous Single Port SRAM memory compiler....
141
0.118
Single Port SRAM Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash HS process, Single Port SRAM memory compiler....
142
0.118
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process Ultra high speed Synchronous Single Port SRAM memory compiler....
143
0.118
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE Logic process synchronous High-density Single Port SRAM memory compiler....
144
0.118
Single Port SRAM Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, 1.41um2-Bit cell Single Port SRAM memory compiler....
145
0.118
Single Port SRAM Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous, high density Single Port memory compiler....
146
0.118
Single Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um low leakage process Synchronous high density Single Port SRAM compiler....
147
2.0
Xilinx Ultra Scale NVME Host IP
The LDS NVME HOST K7U IP is one of the most flexible NVME HOST IP in the market. It has been done for beginners and expert in NVMe to drive NVMe PC...
148
0.118
Single Port SRAM Compiler IP, UMC 0.11um SP process
UMC 0.11um eFlash SP process, Single Port SRAM compiler....
149
0.118
Single Port SRAM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG standard process synchronous high density Low Power Single Port SRAM memory compiler....
150
0.118
Single Port SRAM Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous high density Single Port SRAM memory compiler....