151 0.118

Single Port SRAM Compiler IP, UMC 0.13um SP process UMC 0.13um HS/FSG Logic process synchronousultra high speed Single Port SRAM memory compiler....

152 0.118

Single Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um G2 process UMC 0.18um GII Logic process synchronous high density, Low Power mini Single Port SRAM....

153 0.118

Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high speed , UMC 0.18um G2 process UMC 0.18um GII Logic process synchronous high speed Single Port SRAM memory compiler....

154 0.118

Single Port SRAM Compiler IP, UMC 0.25um process UMC 0.25um Logic process standard asynchronous low density Low Power Single Port SRAM memory compiler....

155 0.118

Single Port SRAM Compiler IP, UMC 0.25um process UMC 0.25um Logic process synchronous low density Low Power Single Port SRAM memory compiler....

156 0.118

Single Port SRAM Compiler IP, UMC 0.25um process UMC 0.25um Logic process synchronous high density Single Port SRAM memory compiler....

157 0.118

Single Port SRAM Compiler IP, UMC 0.25um process UMC 0.25um Logic process synchronous Single Port Low Power SRAM memory compiler....

158 2.0

Xilinx UltraScale Plus NVME Hhost IP The LDS NVME HOST ZUP IP is one of the most flexible NVME HOST IP in the market. It has been done for beginners and expert in NVMe to drive NVMe PC...

159 0.118

Single Port SRAM Compiler IP, UMC 0.25um process UMC 0.25um Logic process synchronous high density Single Port SRAM memory compiler....

160 0.118

Single Port SRAM Compiler IP, UMC 0.25um SP process UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler....

161 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process high density Single Port SRAM, UMC 28nm HLP process....

162 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler....

163 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler....

164 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP process standard LVT synchronous high density Single Port SRAM memory compiler....

165 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler....

166 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP process LVT synchronous high density Single Port SRAM memory compiler....

167 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP synchronous high density Single Port SRAM memory compiler....

168 0.118

Single Port SRAM Compiler IP, UMC 28nm HLP process UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler....

169 2.0

Xilinx ZYNQ NVME HOST IP The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD....

170 0.118

Single Port SRAM Compiler IP, UMC 40nm LP process ULL Single Port SRAM, UMC 40nm LP process....

171 0.118

Single Port SRAM Compiler IP, UMC 40nm LP process UMC 40nm LP/LVT Single Port SRAM compiler with peripheral LVT and Power Gating....

172 0.118

Single Port SRAM Compiler IP, UMC 40nm LP process UMC 40nm LP/LVT Single Port SRAM compiler with Power Gating & row redundancy....

173 0.118

Single Port SRAM Compiler IP, UMC 40nm LP process ULL Single Port SRAM with row redundancy, UMC 40nm LP process....

174 0.118

Single Port SRAM Compiler IP, UMC 55nm eFlash process UMC 55nm eFlash Single Port SRAM compiler with Power Gating /HVT....

175 0.118

Single Port SRAM Compiler IP, UMC 55nm eFlash process UMC 55nm eFlash Single Port SRAM with row redundancy/HVT/Power Gating....

176 0.118

Single Port SRAM Compiler IP, UMC 55nm LP process UMC 55um LP Low-K process ULL Singal-Port SRAM compiler....

177 0.118

Single Port SRAM Compiler IP, UMC 55nm LP process UMC 55um LP Low-K process Singal-Port SRAM compiler with redundancy feature....

178 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm eFlash with peripheral HVT & redundancy Single Port SRAM....

179 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler....

180 2.0

Xilinx Kintex 7 NVME HOST IP The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD....

181 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler....

182 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier....

183 0.118

Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

184 0.118

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

185 0.118

DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

186 0.118

DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

187 0.118

DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process...

188 0.118

DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device...

189 0.118

DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process...

190 0.118

DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process...

191 2.0

NVME-HOST-IP VIRTEX 7 The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD....

192 0.118

DDR2/MDDR Combo Command/Address Block ; UMC 0.13um HS/FSG Logic Process DDR2/MDDR Combo Command/Address Block ; UMC 0.13um HS/FSG Logic Process...

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DDR2/DDR1/MDDR Combo Command/Address Block ; UMC 65nm LP/RVT LowK Logic Process DDR2/DDR1/MDDR Combo Command/Address Block ; UMC 65nm LP/RVT LowK Logic Process...

194 0.118

Command/address block of 1:2 DDR2-PHY ; 0.11um HS/AE (AL Advanced Enhancement) Logic Process Command/address block of 1:2 DDR2-PHY ; 0.11um HS/AE (AL Advanced Enhancement) Logic Process...

195 0.118

1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process 1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...

196 0.118

DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process...

197 0.118

DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process...

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DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process...

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DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process...

200 0.118

DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process...