Design & Reuse
1878 IP
1
14.0
USB2.0 OTG PHY supporting UTMI+ level 3 interface - 40LL / 110G / 130G / 130EF
The USB2.0 OTG PHY is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design usage. The USB2.0 O...
2
14.0
Multi Standard programmable SERDES PHY with single/multi-lane configurations with support of long-reach channel
This 12.5Gbps SERDES IP is designed for smooth integration of Multiple SERDES lanes offering best in class performance, area and power. The programmab...
3
0.0
32-bit, 33 MHz PCI Target Interface Core
The main PCI-T32 Interface core purpose is to isolate the user from having to solve complex problems of the PCI interface implementation and let the u...
4
20.0
PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 4.0 IP suppo...
5
1.0
GLOBALFOUNDRIES 55nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
6
1.0
GLOBALFOUNDRIES 28nm USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog fro...
7
1.0
SAMSUNG 28nm FDSOI USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog fro...
8
1.0
SMIC 28nm USB3.0 Dual Role PHY/Type-C
The USB3.0 Type-C PHY IP is designed to the USB 3.0, USB2.0 Specification and the USB Type-CTM USB Cable and Connector Specification Revision 1.1....
9
1.0
GLOBALFOUNDRIES 22nm FDSOI USB2.0 OTG PHY
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10
1.0
GLOBALFOUNDRIES 22nm FDSOI USB3.0 PHY
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11
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Slave V1.0/V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v1.0 and D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Slav...
12
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V1.0/V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v1.0 and D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...
13
1.0
Samsung 28nm FDSOI USB3.0 Type-C PHY
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14
1.0
Samsung 28nm FDSOI MIPI DPHY V1.1
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15
10.0
DisplayPort TX IP for high-bandwidth applications (12nm, 16nm, 28nm)
M31 DisplayPort TX IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. DisplayPort TX supp...
16
1.0
SMIC 55nm LL USB2.0 PHY
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17
1.0
GLOBALFOUNDRIES 22nm FDX MIPI DPHY Master V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Master side. Each...
18
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of 1-Clock and 4-Data lanes. It can support Slav...
19
1.0
Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY
The USB3.0 Super-Speed / PCI Express Combo PHY is a programmable IP that is compatible with the PHY Interface for PCI Express and USB3.0 Super-Speed A...
20
1.0
USB2.0 OTG PHY
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21
1.0
USB1.1PHY controller
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22
1.0
Crystal-less USB2.0 device PHY
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23
1.0
Crystal-less USB2.0 device PHY
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24
1.0
Crystal-less USB2.0 device PHY
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25
1.0
Ultra-low cost and high performance crystal-less USB2.0 device PHY
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26
10.0
UFSHCI 4.0
The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides comma...
27
1.0
Crystal-less USB2.0 device PHY
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28
1.0
Crystal-less USB1.1 device PHY total solution(XRG013EFDUSB2PY_DNXC50A)
Ultral-small size: 0.033mm2; High performance, low EMI TX driver design...
29
1.0
Crystal-less USB1.1 device PHY
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30
1.0
Crystal-less USB1.1 device PHY(No analog PADs)
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31
1.0
Crystal-less USB1.1 device PHY total solution
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32
1.0
Crystal-less USB 1.1 Transceiver PHY
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33
1.0
Normal USB1.1 device PHY
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34
1.0
Crystal-free USB1.1 device PHY
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35
1.0
Normal USB1.1 device PHY
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36
1.0
Normal USB1.1 device PHY
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37
20.0
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....
38
1.0
USB1.1 PHY - HHGrace 110nm ULL
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39
1.0
USB2.0 PHY - SMIC 180nm Logic
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40
1.0
USB2.0 PHY - SMIC 153nm Logic
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41
1.0
USB1.1 PHY - SMIC 180nm Logic
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42
1.0
USB1.1 PHY - SMIC 180nm Logic
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43
1.0
USB 2.0 OTG Controller - SMIC 55nm Eflash
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44
1.0
USB1.1 PHY - SMIC 55nm Eflash
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45
1.0
USB 2.0 PHY - SMIC 55nm Eflash
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46
1.0
USB 2.0 PHY - SMIC 55nm Eflash
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47
1.0
USB3.0 PHY - SMIC 55nm Eflash
High speed analog circuits for USB3.0 PHY application 745um*620um...
48
20.0
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...
49
1.0
USB2.0 PHY - SMIC130nm Eflash
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50
1.0
USB1.1 PHY - SMIC130nm Eflash
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