701 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 12SF++ Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PIPE interface protocol, and ...

702 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF The combination PHY consists of a Serial ATA (SATA) conforming with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) com...

703 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+ The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwidth data transfers. Th...

704 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 12SF++ A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data transfers while using...

705 0.0

MIPI D-PHY CSI-2 RX (Receiver) in TSMC 65LP The MXL-DPHY-CSI-2-RX-T-065LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-...

706 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication while operating at lo...

707 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 12SF+/SF++ This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4.3 interface spec. Lo...

708 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in GF 22FDX This PCIe 3.0 PHY complies with the PCIe 3.0 Base Specification and supports the PIPE 4.3 interface specification. The Gen 3 has a capability for extr...

709 0.0

12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 12SF++ The multi-protocol SerDes PHY includes Peripheral Component Interconnect Express (PCIe) conforming with PCIe 2.0 Base Specification with support for P...

710 0.0

12.5G Multiprotocol Serdes IP, Silicon Proven in UMC 28HPC The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...

711 0.0

V-by-One/ LVDS Tx IP, Silicon Proven in SMIC 40LL The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...

712 0.0

V-by-One/LVDS Rx IP, Silicon Proven in SMIC 40LL V-by-One® HS technology targets a high-speed data transmission of video signals based on internal connection of equipment. V-by-One® HS Standard defin...

713 0.0

PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC For high-bandwidth applications, the PCIe 5.0 PHY IP offers excellent performance, multi-lane capabilities, and low power design. The PCIe 5.0 IP comp...

714 0.0

PCIe 4.0 Serdes PHY IP Silicon Proven in TSMC 7nm The high-bandwidth applications benefit from the low power, multi-lane, and high-performance PCIe 4.0 PHY IP's design. A full variety of PCIe 4.0 Base...

715 0.0

PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC For high-bandwidth applications, the PCIe 4.0 PHY IP delivers high-performance, multi-lane capabilities and a low-power design. A full variety of PCIe...

716 0.0

MIPI D-PHY Universal IP in TSMC 28LP The MXL-DPHY-UNIVERSAL-T-028LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI Alliance Standard fo...

717 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 7nm For the high-bandwidth applications, PCIe 3.0 PHY IP offers high-performance, multi-lane capabilities, and low-power design. The PCIe 3.0 IP complies ...

718 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC To support high-bandwidth applications, PCIe 3.0 PHY IP provides a low-power, multi-lane, high-performance design. The PCIe 3.0 IP complies with the P...

719 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC High-bandwidth applications can avail advantage of PCIe 3.0 PHY IP's high performance, multi-lane scalability, and low-power layout. A full variety of...

720 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP The PCIe 3.0 PHY IP is designed to support increased applications with its low-power, multi-lane, high-performance design. It fully supports a wide ra...

721 0.0

PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 7nm A comprehensive selection of PCIe 2.0 Base applications is offered by PCIe 2.0 transceiver IP. It complies with the requirements of PIPE 3.0. In order...

722 0.0

PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC A wide variety of PCIe 2.0 Base applications are available with PCIe 2.0 transceiver IP. It adheres to the PIPE 3.0 standard. In order to enable PCIe ...

723 0.0

PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC The whole spectrum of PCIe 2.0 Base applications is offered by PCIe 2.0 transceiver IP. It adheres to the PIPE 3.0 standard. The PCIe 2.0 data rate at...

724 0.0

PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 40ULP The full gamut of PCIe 2.0 Base operations is covered by PCIe 2.0 transceiver IP. It conforms to the PIPE 3.0 standard. This IP combines high-speed mi...

725 0.0

PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 40LP Compliance with the PCIe 3.0 Base Specification is standardized by the PCIe 3.0 PHY IP with PIPE 4.3 interface standard. Because the low power mode op...

726 0.0

PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 14SF+ The PCIe 2.0 transceiver IP supports all PCIe 2.0 Base applications. It complies with the PIPE 3.0 standard. This IP incorporates high-speed mixed sig...

727 0.0

MIPI M-PHY in SMIC 90LL The MXL_MPHY_S_090LL is a high-frequency low-power, low-cost, Physical Layer IP that supports the MIPI Alliance Standard for M-PHY. The IP can be used...

728 0.0

HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in ST 28FDSOI The logic required to create and validate designs for diverse applications is provided by HDMI Transmitter (TX) IP solutions, which are compliant with...

729 0.0

V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+ V-by-One/ LVDS Tx Combo PHY IP Core aims at achieving high-speed data transmission for video signals through internal equipment connections. The V-by-...

730 0.0

V-by-One Tx IP, Silicon Proven in 40G The V-by-One HS technology aims to transmit video signals at a high data rate using an internal connection between devices. The requirements to create...

731 0.0

V-by-One Rx IP, Silicon Proven in 40G Using internal equipment connections, the V-by-One HS technology seeks to send video signals at a high data rate. The V-by-One HS Standard outlines th...

732 0.0

Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 55SP The DisplayPort transmitter PHY version 1.4 can transmit data at rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). Common-mode biassing of the CDR bandw...

733 0.0

Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP The maximum capacity of the Display Port 1.4 Rx IP Channel is supported. Up to 5.4bps per channel, programmable analogue settings such as CDR Bandwidt...

734 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...

735 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

736 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 7FF A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2....

737 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 16FFC The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...

738 10.0

USB 3.0 femtoPHY in GF (28nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

739 0.0

MIPI M-PHY in TSMC 65LP The MXL-M-PHY-DIGRF is a high-frequency low-power, low-cost, Physical Layer IP that supports the MIPI® Alliance Standard for M-PHY and DigRF. The IP ...

740 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+ All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

741 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 12FFC For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The PHY complies with the requirements of UTMI, USB 2.0 PIPE, and USB 3.0 ...

742 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 16FFC A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2....

743 10.0

USB 3.0 PHY IP, Silicon Proven in TSMC 22ULP The USB 3.0 PHY IP Core is a transceiver provided for supplementary devices, compliant with UTMI (USB SuperSpeed), USB 3.0, and USB 2.0 PIPE requireme...

744 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 40LP A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY complies with the UTMI, USB 3.0, and USB 2.0 PIPE requirements (U...

745 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 55LP For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The UTMI, USB 3.0, and USB 2.0 PIPE requirements are met by the PHY (USB S...

746 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 7FF The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 tra...

747 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 12FFC The whole physical layer (PHY) IP solution for USB 2.0 was designed for outstanding performance and low power consumption. The High-Speed USB 2.0 Tran...

748 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 55LP In order to deliver great performance and use little power, the whole physical layer (PHY) IP solution for USB 2.0 was developed. The High-Speed USB 2...

749 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 65LP A complete physical layer (PHY) IP solution designed for outstanding performance and minimal power consumption is the USB2.0 PHY IP. The USB2.0 IP imp...

750 20.0

MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 40LP The MXL-DPHY-CSI-2-RX+-T-040LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard f...