Design & Reuse
1878 IP
1001
3.0
I2C Master / Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-MS-APB Controller IP Core interfaces a microprocessor via the APB system Interconnect Fabric to an I2C Bus. The I2C is a t...
1002
0.0
I2C Master Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-I2C-M-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...
1003
0.0
I2C Master Controller w/FIFO (AXI & AXI-Lite Bus)
The Digital Blocks DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AX...
1004
11.0
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List
The Digital Blocks DB-DMAC-MC2-CS-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memo...
1005
0.0
eSPI & SPI Master Controller w/FIFO
The Digital Blocks DB-eSPI-SPI-M-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI)...
1006
0.0
eSPI & SPI Slave Controller w/FIFO
The Digital Blocks DB-eSPI-SPI-S-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI)...
1007
1.0
RTP / UDP / IP Hardware Stack for H.264/H.265 NAL Video Streams Packet Processing
The Digital Blocks DB-RTP-UDP-IP-NAL IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor...
1008
0.0
I2C Bus Interface - Master
The I2C is a two-wire, bi-directional serial bus, that provides a simple and efficient method of short distance data transmission between many devices...
1009
0.0
Slave I2C bus controller with FIFO
The DI2CS core provides an interface between a microprocessor / microcontroller and I2C bus. It can work as: - a slave transmitter or - slave receiv...
1010
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 65nm
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification for D-PHY...
1011
0.0
I2C Bus Interface Slave -Base version
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
1012
0.0
I2C Bus Interface - Master/Slave
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
1013
0.0
USB 2.0 Device Controller
The DUSB2 is hardware implementation of full/high-speed peripheral controller that interfaces to the UTMI bus transceiver. The DUSB2 contains the USB ...
1014
5.0
MIPI I3C Basic v1.1.1 specifications with Host Controller Interface v1.1 specification
The I3C (Improved Inter-Integrated Circuit) is the successor of the I2C bus. Keeping the best assets from its elder brother, the I3C has major improve...
1015
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 28nm 28HP (CLN28HP)
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1016
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 40nm 40G (CLN40G)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1017
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 40nm 40LP (CLN40lp)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1018
3.0
Configurable AES Core
eSi-AES is a range of sophisticated AES cores for use in ASIC or FPGA technologies. They can be configured to customer the requirements to enable a...
1019
1.0
Digital Down Converter core
The eSi-DDC is a Digital Down Converter combining a Digital Frequency Synthesizer (DDS) with a Digital Mixer. The DDS is implemented in a resource ef...
1020
1.0
RSA public key cryptography with APB interface
The standard RSA module is available as an APB peripheral, where it seamlessly integrates with EnSilica's cryptography library. The peripheral can be...
1021
10.0
MIPI C-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP
The MXL-CPHY-CSI-2-TX+ is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Master supporting ...
1022
0.0
Digital IIR filter with APB interface
A range of 5th to 11th order digital IIR filters for conditioning and optionally decimating data from an external source and to DMA the output into pr...
1023
0.0
APB peripheral implementing the functionality of the ETSI TS 102613 V7.9.0 (2011-03) MAC Layer
The eSi-SWP MAC is an APB peripheral and implements the functionality of the ETSI TS 102 613 V7.9.0 (2011-03) MAC Layer....
1024
0.118
APB Fundamental Peripheral IP, Serial Interface controller for multiple frame formats, SSP (by TI), SPI (by Motorola), Microwire (by NS), I2S (by Philips), AC - link (by Intel) and SPDIF (by Intel), Soft IP
Synchronous serial port interface controller with APB interface....
1025
0.118
Direct memory access controller with AHB interface
Direct memory access controller with AHB interface....
1026
0.118
APB Fundamental Peripheral IP, I2C controller, Soft IP
I2C bus interface controller with APB interface....
1027
0.118
USB 1.1 Device Controller IP, Soft IP
USB 1.1 device controller with AHB interface....
1028
0.118
USB 2.0 Device Controller IP, Device controller, Soft IP
USB 2.0 device controller....
1029
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.18um G2 process
USB 1.1 On-The-Go transceiver (ECN spec), UMC 0.18um GII Logic process....
1030
0.118
AHB system Peripheral IP, IDE Host controller, Soft IP
IDE host controller with AHB interface....
1031
0.118
APB Fundamental Peripheral IP, IO controller, Soft IP
General purpose input/output controller with APB interface....
1032
45.0
MIPI D-PHY Universal IP - 4.5Gbps/lane, MIPI D-PHY v2.5 Compliant in TSMC 22ULP
The MXL-D-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...
1033
0.118
APB Fundamental Peripheral IP, Keyboard/Mouse controller, Configurable keypad matrix from 4x4 to 8x16, Soft IP
Keyboard/Mouse controller with APB interface....
1034
0.118
AHB system Peripheral IP, SDRAM controller, Soft IP
Synchronous DRAM controller with AHB interface....
1035
0.118
AHB system Peripheral IP, SRAM controller, Soft IP
Static memory controller with AHB interface....
1036
0.118
SATA II PHY IP, Support SATA Gen1 1.5Gb/s and SATA Gen2 3.0Gb/s, UMC 0.18um Logic process
Single channel serial ATA PHY layer compliant with SATA spec. of 3.0Gbps....
1037
0.118
SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Serial ATA (SATA) physical layer that provides a complete range of host and device functions, UMC 0.13um HS/FSG Logic process....
1038
0.118
USB 1.1 PHY IP, UMC 0.13um HS/FSG process
USB 1.1 PHY, UMC 0.13um HS/FSG Logic process....
1039
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.13um SP/FSG process
USB 1.1 On-The-Go transceiver, UMC 0.13um SP/FSG Logic process....
1040
0.118
USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process....
1041
0.118
USB 1.1 PHY IP, UMC 0.15um SP process
USB 1.1 PHY, UMC 0.15um SP Logic process....
1042
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.15um SP process
USB 1.1 On-The-Go transceiver, UMC 0.15um SP Logic process....
1043
10.0
MIPI D-PHY Universal IP in TSMC 65GP
The MXL-D-PHY-UNIV-T-65GP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
1044
0.118
SATA II PHY IP, Gen-2, 1 - port, UMC 0.18um G2 process
1.5G/3.0Gbps 1 port Serial ATA PHY and ESATA, UMC 0.18um GII Logic process....
1045
0.118
USB 1.1.OTG PHY IP, OTG, UMC 0.25um Logic process
USB 1.1 On-The-Go transceiver (ECN spec), UMC 0.25um Logic process....
1046
0.118
AHB system Peripheral IP, AHB Arbiter, Soft IP
The IP is AHB Controller composed of ar-Biter, dECOder and Mux....
1047
0.118
AHB system Peripheral IP, AHB - to - APB Bridge, Soft IP
The IP is APB Bridge between AHB bus and APB bus....
1048
0.118
SATA Controller IP, SATA Gen-3 Host, Soft IP
SATA AHCI host controller with PVCI/AHB/AXI interface....
1049
0.118
PCI-X Controller IP, PCIX 1.0b, Soft IP
PCI-X 1.0b device/host bridge controller....
1050
0.118
USB 2.0 OTG PHY IP, UMC 0.13um LL/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um LL process....