1301 0.0

UCIE 1.0 Support for multiple protocol PCIE/CXL/Streaming...

1302 0.0

PCIE Gen7 Controller Gen7 supports 128Gbps and backward compatible with previous versions of PCIE....

1303 0.0

PCIe 6.2 Switch IP Controller ...

1304 0.0

MIPI D-PHY TRx(80-2500Mbps) 14nm The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1305 0.0

MIPI D-PHY TRx(80-2500Mbps) 28nm The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1306 0.0

DSC 1.2b Encoder The DSC 1.2b Encoder is an efficient video compression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for lo...

1307 0.0

DSC 1.2b Decoder The DSC 1.2b Decoder is an efficient video decompression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for ...

1308 0.0

MIPI CSI-2 RX Controller The Camera Serial Interface 2 (CSI-2) Receiver (RX) Controller is a digital core that implements all protocol functions defined in the MIPI Alliance S...

1309 0.0

MIPI DSI-2 TX Controller The Display Serial Interface 2 (DSI-2) Transmitter (TX) Controller is a digital core that implements all protocol functions defined in the MIPI Allian...

1310 0.0

AXI to APB Bus Bridge The AXI to APB Bridge translates an AXI bus transaction (read or write) to an APB bus transaction. This is accomplished via two state machines – one ...

1311 0.0

MIPI C-PHY TRx(80-8000Msps) 5nm The MIPI C-PHY IP supports data rates of up to 8Gsps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provides...

1312 0.0

PCIe refclk buffer on 14nm The output buffer to deliver a differential clock signal from inside chip to outside for PCIe interface...

1313 0.0

PCIe refclk buffer on 8nm The output buffer to deliver a differential clock signal from inside chip to outside for PCIe interface...

1314 0.0

PCIe 6.0 PHY on 4nm The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.0 specification. This IP offers a cost-effective and low-power so...

1315 0.0

PCIe 4.0 PHY on 8nm The PCIe PHY IP consists of hardmacro PMA and softmacro PCS compliant to PCIe Base 4.0 specification. This IP offers a cost-effective and low-power so...

1316 0.0

eDP v1.5a RX PHY 14nm The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1Gbps), and the general mode supports a maximum data rate of up to 4Gbps. This core IP is...

1317 0.0

MIPI C-PHY TRx(80-8000Msps) / MIPI D-PHY TRx(80-9000Mbps) Combo PHY 4nm The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 9Gbps for D-PHY and 8Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), and Es...

1318 0.0

MIPI D-PHY TRx(80-4500Mbps) 8nm The MIPI D-PHY IP supports data rates of up to 4.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1319 0.0

MIPI D-PHY TRx(80-4500Mbps) 5nm The MIPI D-PHY IP supports data rates of up to 4.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1320 0.0

MIPI D-PHY TRx(80-2500Mbps) 14nm The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1321 0.0

AXI External Memory Controller The AXI External Bus Interface (EBI) allows the processor to transmit and receive data to an external device, usually a memory (SRAM, Flash, etc.). Th...

1322 0.0

MIPI D-PHY TRx(80-2500Mbps) 14nm The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1323 0.0

MIPI D-PHY TRx(80-2500Mbps) 11nm The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1324 0.0

MIPI D-PHY TRx(80-2100Mbps) 14nm The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1325 0.0

MIPI D-PHY TRx(80-2100Mbps) 14nm The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...

1326 0.0

MIPI D-PHY TRx(80-2150Mbps) 28nm The MIPI D-PHY IP supports data rates of up to 2.15Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provi...

1327 0.0

MIPI C-PHY TRx(80-2500Msps) / MIPI D-PHY TRx(80-4500Mbps) Combo PHY 8nm The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...

1328 0.0

MIPI C-PHY TRx(80-2500Msps) / MIPI D-PHY TRx(80-4500Mbps) Combo PHY 4nm The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...

1329 0.0

UCIe 1.1 PHY 5nm The UCI Express Specification Revision 1.1 supports high-speed serialization and deserialization at 4GT/s, 8GT/s, 12GT/s, and 16GT/s with a 16-lane co...

1330 0.0

UCIe 2.0 PHY 4nm The UCI Express Specification Revision 2.0 supports high-speed serialization and deserialization at 4GT/s, 8GT/s, 12GT/s, 16GT/s, 24GT/s and 32GT/s wi...

1331 100.0

MIPI CSI-2 Controller Core V2 The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...

1332 10.0

AHB MultiMatrix Fabric The AHB Fabric provides the necessary infrastructure to connect up to 16 shared AHB Slaves to up to 16 AHB-Lite Bus Masters. The off-the-self configu...

1333 100.0

MIPI DSI-2 Controller Core The Rambus DSI-2 Controller Core is the second generation DSI controller core. It is further optimized for high performance, low power and small size....

1334 0.0

MIPI Testbench Rambus MIPI Testbench from Rambus emulates a MIPI device enabling end-to-end simulation of a MIPI design. This includes the follow features: • Separ...

1335 70.0

PCIe Controller Testbench PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design. This includes the following features: • R...

1336 0.0

PCIe 3.0, 2.1, 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with AMBA AXI User Interface Rambus PCIe 3.0 with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 3.0 with AXI is...

1337 0.0

PCIe 3.0, 2.1, 1.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root po...

1338 0.0

ASIL-B Ready ISO 26262 Certified VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter The DisplayPort Forward Error Correction (FEC) Transmitter IP Core implements Reed-Solomon FEC and symbol interleaving as specified by the VESA Displa...

1339 100.0

PCIe 7.0 Retimer Controller The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...

1340 70.0

PCIe 6.2 Switch The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...

1341 70.0

CXL 3.0 IP EMPOWER YOUR DESIGN WITH UNMATCHED CXL PERFORMANCE Highly advanced and versatile CXL Controller IP that empowers your design with unparalleled spee...

1342 3.0

Multi-Link Multi-Protocol SerDes 16Gbps in TSMC 28HPC Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...

1343 0.0

AHB Channel with Decoder and Data Mux The AHB Channel provides the necessary infrastructure to connect as many as 7 AHB Slaves (numbered 1-7) to an AHB bus Master. The AHB Channel perform...

1344 23.0

DisplayPort Transmitter Link Controller Our 5th generation DisplayPort Transmitter Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link r...

1345 23.0

DisplayPort Receiver Link Controller Our 5th generation DisplayPort Receiver Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link rate...

1346 25.0

Flash SPI controller master/slave Veriest's SPI Master Controller IP provides an industry standard data communication channel between the AMBA APB and SPI buses. It supports SPI master...

1347 1.0

SMIC 0.18um PCI-X IO The PCI-X transceiver is a IP version of PCI-X I/O pads, which is fully compatible with PCI-X R1.0 specification....

1348 1.0

USB1.1 PHY The USB11PHY is an IP version of USB transceiver. It receives data with DP and DM and transfers data to USB11 core with RCV, VM and VP. It is designed...

1349 1.0

USB 1.1 PHY The USB1.1 PHY is an IP version of USB transceiver. It receives data with DP and DM and transfers data to USB1.1 core with RCV, VM and VP. It is desig...

1350 1.0

USB1.1 PHY The USB11PHY is an IP version of USB transceiver. It receives data with DP and DM and transfers data to USB11 core with RCV, VM and VP. It is designed...