Design & Reuse
1878 IP
251
2.0
SATA Host on Xilinx Zynq Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS SATA 3 H...
252
0.0
HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
This HDMI 2.O Rx IP complies with HDMI specification version 2.0b and offers a full HDMI receiver capability. It is made up of two modules: a link mod...
253
0.0
HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
The HDMI 2.O Rx IP complies with version 2.0b of the HDMI specification and offers the full functionality of an HDMI receiver. Physical layer (PHY) an...
254
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 90/85G
Physical layer IP core for HDMI transmitters that adheres to HDMI 1.4 requirements in full For consumer electronics like DVD player/recorders and camc...
255
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 130/110G
IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY supports pixel clocks between 2...
256
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
257
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
In addition to adhering to HDMI 2.0 and 1.4 specifications, IP solutions for HDMI Transmitter (TX) devices offer the essential logic required to creat...
258
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...
259
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 65/55ULP
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
260
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in GF 65/55LPe
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
261
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55G
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
262
2.0
Xilinx Ultra Scale Plus SATA HOST IP
The LDS_SATA3_HOST_GTHE4 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Ultra Scale Plus GTHE4 FPGA. The LDS_SATA3_...
263
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55SP
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
264
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 40LL
IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...
265
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in ST 28FDSOI
IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...
266
0.0
HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in GF 65/55LPe
The HDMI receiver PHY (Physical layer), a single-port IP core, fully conforms with HDMI 1.4's requirements. This HDMI RX PHY supports TMDS rates betwe...
267
0.0
HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in SMIC 65/55SP
The single-port IP core, HDMI receiver PHY (Physical layer), completely complies with HDMI 1.4's specifications. This HDMI RX PHY provides a straightf...
268
0.0
HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in ST 28FDSOI
The HDMI receiver PHY (Physical layer), a single-port IP core, complies with all the specifications of HDMI 1.4. This HDMI RX PHY provides a straightf...
269
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...
270
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...
271
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
Version 1.4 of the DisplayPort transmitter PHY is capable of transmitting data at rates of 1.62Gbps (RBR) to 5.4Gbps (HBR2). programmable analogue fea...
272
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP
The Display Port 1.4 Rx IP Channel's maximum capacity is supported. Programmable analogue parameters including CDR Bandwidth, Equalizer Strength, Term...
273
0.3729
I2C Controller & PHY
DTI I2C Controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C ...
274
0.0
Display Port 1.4 Rx PHY & Controller IP (Silicon Proven in IDM 180nm /150nm)
Display port 1.4 Rx IP supports Channel bandwidth Up to 5.4bps per channel (HBR2), Programmable analog characteristics like CDR Bandwidth, Equalizer s...
275
0.0
V-by-One Rx IP, Silicon Proven in SMIC 40LL
The V-by-One HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a trans...
276
50.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
The PHY combo comprises Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PCIe ...
277
0.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of PIPE interface sp...
278
0.0
V-by-One/LVDS Rx IP, Silicon Proven in GF 22FDX
The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...
279
0.0
V-by-One/LVDS Tx IP, Silicon Proven in GF 22FDX
Based on internal equipment connections, the V-by-One® HS technology aims to transmit video signals at high data rates. The requirements to build a tr...
280
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 40LL
The multi-protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of P...
281
0.0
ISO 7816 based digital controller for integrated circuit card compliant with ETSI TS 102 221 and EMV 2000 standards
Smart card controller core is compliant to ISO 7816 3 specification. The core is a technology independent, fully synchronous design. The controller fu...
282
0.0
I2C Bus Master / Slave Controller Interface with FIFO
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
283
0.0
I2C Master / Slave Controller with FIFO (AXI & AXI-Lite Bus)
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
284
0.3729
Dolphin I2S Controller & PHY
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices. The controller is compliant with NXP Inter-IC Sound Bus Specif...
285
0.0
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
With compatibility for PIPE 4.4 interface protocol, this Peripheral Component Interconnect Express (PCIe) x4 PHY complies with PCIe 4.0 Base Specifica...
286
0.0
PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 40LP
PCIe Gen 3.1 transmission is supported by (PCIe 3.1) x4 PHY IP. With compatibility for PIPE 4.3 interface spec, this complies with PCIe Rev3 Base Spec...
287
0.0
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2. By providing a full on-chip physical transceiver solution with Electro Static Discharge (ESD) protectio...
288
50.0
MIPI D-PHY Tx IP, Silicon Proven in TSMC 22ULP
The MIPI D-PHY Analog TX IP Core adheres fully to version 1.2 of the D-PHY specification. It supports both the MIPI Camera Serial Interface (CSI-2) an...
289
75.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The HDMI Transmitter (TX) IP offerings adhere to HDMI 2.0 and 1.4 standards, offering the essential components for diverse design implementations. The...
290
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
In addition to adhering to HDMI 2.0 and 1.4 specifications, IP solutions for HDMI Transmitter (TX) devices offer the essential logic required to creat...
291
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2). Integrated 100-ohm termination resistors, a bu...
292
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...
293
0.0
16G Multiproocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 4.0, 3.0, 2.0 Base Specification with su...
294
0.0
USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support of PIPE interface sp...
295
0.3729
Dolphin I3C Controller & PHY
DTI I3C Controller provides the logic consistent with NXP I3C specification to support the communication of low-speed integrated circuits through I3C ...
296
0.0
USB 3.1 Gen1 / Gen2 Host Controller IP
USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ...
297
0.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interface protocols (USB Hig...
298
0.118
MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI CSI Receiver Controller....
299
0.118
MIPI Controller IP, DSI Host, Soft IP
DSI Host Controller....
300
0.118
MIPI Controller IP, DSI Peripheral, Soft IP
MIPI DSI Peripheral Controller....