How to Design SmartNICs Using FPGAs to Increase Server Compute Capacity (WP017)

Achronix WP

Aug. 22, 2019, Aug. 22, 2019 – Intelligent server adapters, or SmartNICs, boost server performance in cloud and private data centers by offloading network processing workloads and tasks from server CPUs. Offloading network processing to a SmartNIC is not a new concept - for example, there are NICs that offload some network-processing functions such as checksum computation and segmentation. However, the rapid explosion in data-center network traffic driven by software-defined networking (SDN), Open vSwitch (OVS), and network functions virtualization (NFV) demands a new class of NIC with even greater offload capabilities: the SmartNIC.

SmartNICs provide several significant benefits to data-center networks including:

• Accelerating network, storage, and compute tasks by executing them directly on the network interface card, eliminating the need to run these workloads on servers and freeing up CPU cycles, thus dramatically improving server performance and reducing overall power consumption resulting in lower system-level total cost of ownership.
• Offloading increasingly complex networking tasks including overlay tunneling protocols such as VxLANand virtual switching from server processors, freeing the server processors to perform actual, revenue-generating tasks.
• Improving effective network bandwidth and throughput by executing offloaded functions in fast hardware instead of slower software.
• Providing additional, flexible functionality that easily accommodates new and constantly changing networking and storage protocols.

A successful SmartNIC design must be able to implement complex data-plane functions including multiple matchaction processing, tunnel termination and origination, traffic metering, and traffic shaping. A SmartNIC should also provide the host processor with per-flow statistics to inform network-tuning algorithms. In addition, the SmartNIC’s high-speed data plane should be programmable through either downloadable updates or network programming to enable a flexible architecture that can easily adapt to changing data plane requirements. A successful SmartNIC design must work seamlessly with existing data-center ecosystems. Otherwise, the SmartNIC design is unlikely to succeed.

The Three Forms of SmartNICs

SmartNIC designs currently take one of three forms:

• Multicore SmartNICs, based on ASICs containing multiple CPU cores
• FPGA-based SmartNICs
• FPGA-augmented SmartNICs, which combine hardware-programmable FPGAs with ASIC network controllers