Design & Reuse
Dolphin Technology
Corporate Headquarters
Dolphin Technology
San Jose, 95113
USA

About Dolphin Technology

Dolphin Technology provides SoC designers with a broad array of silicon-proven IP for Memory, I/O, Standard Cells, DDR PHY, Memory Controllers, PLL/DLL and Memory Test and Repair (BIST). Dolphin offers both standard and custom solutions that are optimized for low power, high performance and high density across a broad range of process technologies. These solutions include: - Memory Compilers (Single & Dual Port SRAM, 1 & 2 Port RF, ROM) - Specialty Memory (ROM, BCAM, TCAM, CAM) - I/O (General purpose, bus-specific, DDR, Flash) - Standard Cell libraries (7-track, 10-track, 12-track, 14-track) - DDR PHY (hardened DDRx & LPDDRx SDRAM PHY) - PLL/DLL (programmable PLL, fully digital DLL) - SERDES - Memory Controllers (DDRx & LPDDRx DRAM) - Memory BIST - And more... Dolphin Technology has been enabling SoC design teams to enhance quality and reduce time to market since 1996.
Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
High Current Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
High Density Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF
Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/FF+
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF/FF+
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF/FF+
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF/FF+
Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FFC/FFC+
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FFC/FFC+
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FFC/FFC+
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FFC/FFC+
Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF+GL/FF+LL/FFC
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF+GL/FF+LL/FFC
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF+GL/FF+LL/FFC
Ultra Low Leakage/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process ULL/ULP
Ultra Low Leakage/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process ULL/ULP
Ultra Low Leakage/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process ULL/ULP
Ultra Low Leakage/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process ULL/ULP
High Performance/Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
High Performance/Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
High Performance/Low Power/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process HP/H
High Performance/Low Power/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process HP/
Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
Low Power/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULP
Low Power/Ultra Low Power Single Port Multi-banks SRAM Compiler
Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
Low Power/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP/LPEF/ULP/ULPEF
Low Power/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP/LPEF/ULP/ULPEF
Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP
Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP
Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP
Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP
Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process GC
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GC
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, supports process GC
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, supports process GC
High Performance/Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process G/GT/LP/LPEF
High Performance/Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process G/GT/LP/LPEF
High Performance/Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, supports process G/GT/LP/LPEF
High Performance/Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, supports process G/GT/LP/LPEF
Dual Port SRAM Compiler with Row/Column Redundancy Option, supports process G/LV
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process G/LV
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, supports process G/LV
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, supports process G/LV
Memory Test & Repair (MBIST)
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/FF+
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/FF+
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FFC/FFC+
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FFC/FFC+
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Ultra Low Leakage/Ultra Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with write assist, supports process ULL/ULP
Ultra Low Leakage/Ultra Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with write assist, supports process ULL/ULP
High Performance/Low Power/Ultra Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
High Performance/Low Power/Ultra Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
Low Power/Ultra Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
Low Power/Ultra Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
Low Power/Ultra Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
Low Power/Ultra Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, supports process GP/LP
Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GP/LP
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, supports process GC
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GC
High Performance/Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, supports process G/GT/LP/LPEF
High Performance/Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/GT/LP/LPEF
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, supports process G/LV
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV
Dolphin SPI Controller
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 5nm 5FF
1.2V/2.5V Tolerant Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 5nm 5FF
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 5nm 5FF
1.8V/2.5V/3.3V Capable Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 6nm 6FF
1.8V/3.3V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 6nm 6FF
1.8V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 6nm 6FF
1.8V/2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
Automotive 1.8V/2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
1.8V/2.5V/3.3V Capable eMMC IO (eMMC) (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
Automotive 1.8V/2.5V/3.3V Capable eMMC IO (eMMC) (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
1.8V/3.3V Tolerant General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
General Purpose IO 1.8V Fail-Safe (GPIO) - TSMC 12nm 12FFC,FFC+
PCI/PCIX Interface 2.5V, 3.3V Oxide Device - TSMC 0.13um LV,LVOD
SSTL2 Interface 2.5V, 3.3V Oxide Device - TSMC 0.13um LV,LVOD
I2C Interface - TSMC 0.13um LV,LVOD
2.5V/3.3V Tolerant General Purpose IO (rectangle) - TSMC 0.13um LV,LVOD
2.5V/3.3V Capable General Purpose IO (rectangle) - TSMC 0.13um LV,LVOD
2.5V/3.3V Tolerant General Purpose IO (square) - TSMC 0.13um LV,LVOD
2.5V/3.3V Capable General Purpose IO (square) - TSMC 0.13um LV,LVOD
1.8V/2.5V/3.3V Capable General Purpose Fail -Safe IO (GPIO) (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
Automotive 1.8V/2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
1.8V/2.5V/3.3V Capable eMMC IO (GPIO) (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
Automotive 1.8V/2.5V/3.3V Capable eMMC IO (GPIO) (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
1.8V/3.3V Tolerant General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
I2C Fail-Safe Interface (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
Automotive I2C Fail-Safe Interface (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
1.8V Secondary Oxide 3.3V Tolerant General Purpose IO - TSMC 22nm 22ULP,ULL
1.8V Secondary Oxide 1.8V/2.5V/3.3V Capable General Purpose IO (GPIO) - TSMC 22nm 22ULP,ULL
1.8V Secondary Oxide 1.8V/2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) - TSMC 22nm 22ULP,ULL
2.5V Secondary Oxide 3.3V Tolerant General Purpose IO - TSMC 22nm 22ULP,ULL
2.5V Secondary Oxide 2.5V/3.3V Capable General Purpose IO (GPIO) - TSMC 22nm 22ULP,ULL
2.5V Secondary Oxide 2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) - TSMC 22nm 22ULP,ULL
1.8V Secondary Oxide 3.3V Tolerant General Purpose IO - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
1.8V Secondary Oxide 1.8V/2.5V/3.3V Capable General Purpose IO (GPIO) - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
1.8V Secondary Oxide 1.8V/2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
2.5V Secondary Oxide 3.3V Tolerant General Purpose IO - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
2.5V Secondary Oxide 2.5V/3.3V Capable General Purpose IO (GPIO) - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
2.5V Secondary Oxide 2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
2.5V Secondary Oxide 2.5V/3.3V Capable General Purpose IO (GPIO) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
2.5V Secondary Oxide 2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
2.5V Secondary Oxide 3.3V Tolerant General Purpose IO (GPIO) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
1.8V Secondary Oxide 1.8V/2.5V/3.3V Capable General Purpose IO (GPIO) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
1.8V Secondary Oxide 1.8V/2.5V/3.3V Capable General Purpose Fail-Safe IO (GPIO) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
1.8V Secondary Oxide 3.3V Tolerant General Purpose IO (GPIO) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
2.5V/3.3V Capable Fail Safe General Purpose IO - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
2.5V/3.3V Capable General Purpose IO (rectangle) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
PCI/PCIX Interface - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
LVDS/LVPECL combo pad - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
3.3V Tolerant General Purpose IO (rectangle) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
PCI/PCIX Interface 2.5V Oxide Device - TSMC 65nm 65GP,LP,LP_EMF
LVDS/LVPECL combo pad - TSMC 65nm 65GP,LP,LP_EMF
2.5V/3.3V Capable General Purpose IO (rectangle) - TSMC 65nm 65GP,LP,LP_EMF
3.3V Tolerant General Purpose IO (rectangle) - TSMC 65nm 65GP,LP,LP_EMF
1.8V/2.5V/3.3V Capable Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
1.8V/3.3V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
1.8V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
Digital Delay Locked Loop (133MHz – 333MHz) - TSMC 80nm 80GC,LP_EMF
PCI/PCIX Interface 2.5V Oxide Device - TSMC 80nm 80GC,LP_EMF
LVDS/LVPECL combo pad - TSMC 80nm 80GC,LP_EMF
2.5V/3.3V Capable General Purpose IO (rectangle) - TSMC 80nm 80GC,LP_EMF
2.5V/3.3V Tolerant General Purpose IO (rectangle) - TSMC 80nm 80GC,LP_EMF
Digital Delay Locked Loop (133MHz – 333MHz) - TSMC 90nm 90G,GT,LP
LVDS/LVPECL combo pad - TSMC 90nm 90G,GT,LP
2.5V/3.3V Capable General Purpose IO (rectangle) - TSMC 90nm 90G,GT,LP
2.5V/3.3V Tolerant General Purpose IO (rectangle) - TSMC 90nm 90G,GT,LP
PCI/PCIX Interface 2.5V Oxide Device - TSMC 90nm 90G,GT,LP
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
1.2V/2.5V Tolerant Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
1.8V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 6nm 6FF
2.5V LVDS/LVPECL combo pad - TSMC 0.13um LV,LVOD
2.5V/3.3V Capable General Purpose IO (rectangle) - TSMC 0.13um LV,LVOD
2.5V Secondary Oxide DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (in-line/staggered/rectangle-bonPad) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
2.5V Secondary Oxide DDRI/II/III/MDDR SSTL/HSTL combo interface with RTT (in-line/staggeredrectangle-bonPad) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
(Foundry Sponsored) 2.5V/3.3V Capable Fail Safe General Purpose IO - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
Multi Function IO interface (PCI/PCIX/DDR/LVDS/GPIO) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
Multi Function IO interface (PCI/PCIX/DDR/LVDS/GPIO) - TSMC 65nm 65GP,LP,LP_EMF
1.8V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
Multi Function IO interface (PCI/PCIX/DDR/LVDS/GPIO) - TSMC 80nm 80GC,LP_EMF
Multi Function IO interface (PCI/PCIX/DDR/LVDS/GPIO) - TSMC 90nm 90G,GT,LP
1.8V Secondary Oxide DDRx/LPDDRx combo IO interface TSMC 28nm 28HPM (CLN28HPM)
2.5V Secondary Oxide DDRx/LPDDRx combo IO interface TSMC 28nm 28HPM (CLN28HPM)
DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (in-line) - TSMC 40nm 40G (CLN40G)
DDRI/II/III/MDDR SSTL/HSTL combo interface with RTT (in-line) - TSMC 40nm 40G (CLN40G)
DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (staggered) - TSMC 40nm 40G (CLN40G)
DDRI/II/III/MDDR SSTL/HSTL combo interface with RTT (staggered) - TSMC 40nm 40G (CLN40G)
DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (in-line) - TSMC 40nm 40LP (CLN40lp)
DDRI/II/III/MDDR SSTL/HSTL combo interface with RTT (in-line) - TSMC 40nm 40LP (CLN40lp)
DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (rectangle) - TSMC 40nm 40LP (CLN40lp)
DDRI/II/III/MDDR SSTL/HSTL combo interface with RTT (rectangle) - TSMC 40nm 40LP (CLN40lp)
Digital Delay Locked Loop (133MHz – 333MHz) - TSMC 80nm GC (CLN80GC)
Digital Delay Locked Loop (133MHz – 333MHz) - TSMC 90nm GT (CLN90GT)
Digital Delay Locked Loop (133MHz – 333MHz) - TSMC 90nm G (CLN90G)
Digital Delay Locked Loop (133MHz – 333MHz) - TSMC 90nm LP (CLN90LP)
PCI/PCIX Interface 2.5V Device - TSMC 55nm GP (CLN55GP)
PCI/PCIX Interface 2.5V Device - TSMC 65nm GP (CLN65GP)
PCI/PCIX Interface 2.5V Device - TSMC 65nm LP (CLN65LP)
PCI/PCIX Interface 2.5V Device - TSMC 80nm GC (CLN80GC)
PCI/PCIX Interface 2.5V Device - TSMC 90nm LP / G / GT
PCI/PCIX Interface 2.5V Device - TSMC 0.13um LV / LVod
PCI/PCIX Interface 3.3V device - TSMC 0.13um LV / LVod
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
1.2V/2.5V Tolerant Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 5nm 5FF
1.2V/3.3V I2C (CDM5A/7A-ESD) - TSMC 5nm 5FF
LPDDR5 I/O - TSMC 5nm 5FF
DDR5/4 & LPDDR5/4/4x I/O - TSMC 5nm 5FF
1.2V Temperarure sensor (0.5 degree C accuracy) - TSMC 5nm 5FF
1.8V I2C (CDM5A/7A-ESD) - TSMC 6nm 6FF
1.8V/3.3V I2C/I3C combo (CDM5A/7A-ESD) - TSMC 6nm 6FF
DDR5/4 & LPDDR5/4/4x I/O - TSMC 6nm 6FF
Oscillator (1-50)Mhz (CDM5A/7A-ESD) - TSMC 6nm 6FF
Oscillator 32Khz (CDM5A/7A-ESD) - TSMC 6nm 6FF
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 6nm 6FF
DDR4/3 & LPDDR4/3/2 I/O - TSMC 12nm 12FFC,FFC+
I2C Fail-Safe Interface (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
Automotive I2C Fail-Safe Interface (CDM5A/7A-ESD) - TSMC 12nm 12FFC,FFC+
LVDS Combo with PVT Compensation - TSMC 12nm 12FFC,FFC+
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 12nm 12FFC,FFC+
2.5V,3.3V Oxide Device LVDS/LVPECL combo pad - TSMC 0.13um LV,LVOD
Temperarure sensor - TSMC 0.13um LV,LVOD)
LVDS Combo with PVT Compensation - TSMC 16nm 16FFC,FF
DDR4/3 & LPDDR4/3/2 I/O - TSMC 16nm 16FFC,FF
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 16nm 16FFC,FF
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 22nm 22ULP,ULL
2.5V Temperarure sensor (0.5 degree C accuracy) - TSMC 22nm 22ULP,ULL
Supporting ONFI 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 22nm 22ULP,ULL
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
2.5V Temperarure sensor (0.5 degree C accuracy) - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
Supporting ONFI 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
2.5V Temperarure sensor (0.5 degree C accuracy) - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
2.5V Temperarure sensor (0.5 degree C accuracy) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
2.5V Temperarure sensor (0.5 degree C accuracy) - TSMC 65nm 65GP,LP,LP_EMF
1.8V I2C (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
1.8V/3.3V I2C/I3C combo (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
DDR5/4 & LPDDR5/4/4x I/O - TSMC 7nm 7FF,FF+
Oscillator (1-50)Mhz (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
Oscillator 32Khz (CDM5A/7A-ESD) - TSMC 7nm 7FF,FF+
1.8V Temperarure sensor (0.5 degree C accuracy) - TSMC 7nm 7FF,FF+
Temperarure sensor - TSMC 80nm 80GC,LP_EMF
Temperarure sensor - TSMC 90nm 90G,GT,LP
DDR4/3 & LPDDR4/3/2 I/O - TSMC 22nm 22ULP,ULL
DDR4/3 & LPDDR4/3/2 I/O - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
DDR4/3 & LPDDR4/3/2 I/O - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
DDR4/3 & LPDDR4/3/2 I/O - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
DDR4/3 & LPDDR4/3/2 I/O - TSMC 65nm 65GP,LP,LP_EMF
DDR4/3 & LPDDR4/3/2 I/O - TSMC 80nm 80GC,LP_EMF
DDR4/3 & LPDDR4/3/2 I/O - TSMC 90nm 90G,GT,LP
DDR4/3 & LPDDR4/3/2 I/O - TSMC 0.13um LV,LVOD
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
1.2V/3.3V I2C (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
LPDDR5 I/O - TSMC 4nm 4FF/4P
Multi Function IO interface with GPIO and LVDS combo - TSMC 16nm 16FFC,FF
Multi Function IO interface with GPIO and HSTL combo - TSMC 16nm 16FFC,FF
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 3nm
1.2V/3.3V I2C (CDM5A/7A-ESD) - TSMC 3nm
LPDDR5 I/O - TSMC 3nm
High Performance and High Density 10-track Standard cell library - TSMC 0.13um LV / LVOD / GS
Dolphin Temperature Sensor
Ultra High Density and Ultra Low Power 7-track Standard cell library - TSMC 65nm LP / GP / ULP, supports 60/65/70nm channel length
High Performance and High Density 10-track Standard cell library - TSMC 65nm LP / GP / ULP, supports 60/65/70nm channel length
Thick oxide library - TSMC 65nm 65LP LP / GP / ULP
Ultra High Density and Ultra Low Power 7-track Standard cell library - TSMC 80nm GC/LP_eF
High Performance and High Density 10-track Standard cell library - TSMC 80nm GC/LP_eF
Thick oxide library - TSMC 80nm GC/LP_eF
Ultra High Density and Ultra Low Power 7-track Standard cell library - TSMC 90nm GT/G/LP_eF/LP
High Performance and High Density 10-track Standard cell library - TSMC 90nm GT/G/LP_eF/LP
Thick oxide library - TSMC 90nm GT/G/LP_eF/LP
High Performance and High Density 10-track Standard cell library - TSMC 0.13um LV / LVOD / GS
Thick oxide library - TSMC 0.13um LV / LVOD / GS
High Performance & High Density 10 - track Standard Cell library - TSMC 180nm LP/G
Thick oxide library - TSMC 180nm LP/G
Ultra High Density and Ultra Low Power 7-track Standard cell library - TSMC 0.25um G
High Performance & High Density 10 - track Standard Cell library - TSMC 0.25um G
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 0.25um
Thick oxide library - TSMC 0.25um
Ultra High Density, 6nm channel length, 51nm poly pitch TSMC 5nm 5FF
Ultra High Density, 6nm channel length, 57nm poly pitch TSMC 5nm 5FF
High Performance & High Density, 6nm channel length, 51nm poly pitch TSMC 5nm 5FF
High Performance & High Density, 6nm channel length, 57nm poly pitch TSMC 5nm 5FF
Thick oxide library TSMC 5nm 5FF
Ultra High Density, 8nm/11nm channel length, 57nm poly pitch , noncpode TSMC 6nm 6FF
Ultra High Density, 8nm/11nm channel length, 57nm poly pitch , cpode TSMC 6nm 6FF
High Performance & High Density, 8nm/11nm channel length, 57nm poly pitch TSMC 6nm 6FF
High Performance & High Density, 8nm/11nm channel length, 64nm poly pitch TSMC 6nm 6FF
Thick oxide library TSMC 6nm 6FF
Ultra High Density, 8nm/11nm channel length, 57nm poly pitch TSMC 7nm 7FF/7FF+
High Performance & High Density, 8nm/11nm channel length, 57nm poly pitch TSMC 7nm 7FF/7FF+
High Performance & High Density, 8nm/11nm channel length, 64nm poly pitch TSMC 7nm 7FF/7FF+
Thick oxide library TSMC 7nm 7FF/7FF+
Ultra High Density 6 - track, Standard Cell library - TSMC 12nm 12FFC/12FFC+, supports 16/18/20/24 channel length, 96 cpode poly pitch
High Performance & High Density 7.5-track Standard Cell library - TSMC 12nm 12FFC/12FFC+, supports 16/18/20/24 channel length,supports 90nm and 96nm poly pitch supports nonCPODE and CPODE structure
High Performance & Ultra High Density 9-track Standard Cell library - TSMC 12nm 12FFC/12FFC+ 16/18/20/24 channel length, supports 90nm and 96nm poly pitch, supports nonCPODE and CPODE structure
Very High Performance 10.5-track Standard Cell library - TSMC 12nm 12FFC/12FFC+, 16/18/20/24 channel length, supports 90nm and 96nm poly pitch supports nonCPODE and CPODE structure
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 12nm 12FFC/12FFC+, 16/18/20/24 channel length, supports 90nm and 96nm poly pitch supports nonCPODE and CPODE structure
Thick oxide library - TSMC 12nm 12FFC/12FFC+
High Performance & High Density 7.5-track Standard Cell library - TSMC 16nm, supports 16FFC and 16FF+GL/LL, supports 16/18/20/24 channel length, supports 90nm and 96nm poly pitch supports nonCPODE and CPODE structure
High Performance & Ultra High Density 9-track Standard Cell library - TSMC 16nm supports 16FFC and 16FF+GL/LL, supports 16/18/20/24 channel length, supports 90nm and 96nm poly pitch supports nonCPODE and CPODE structure
Very High Performance 10.5-track Standard Cell library - TSMC 16nm, supports 16FFC and 16FF+GL/LL , supports 16/18/20/24 channel length, supports 90nm and 96nm poly pitch, supports nonCPODE and CPODE structure
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 16nm , supports 16FFC and 16FF+GL/LL, supports 16/18/20/24 channel length, supports 90nm and 96nm poly pitch, supports nonCPODE and CPODE structure
Thick oxide library - TSMC 16nm, supports 16FFC and 16FF+GL/LL,
Ultra High Density 6.5-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
Ultra High Density and Ultra Low Power 7-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
High Performance and High Density 9-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
High Performance & High Density 10 - track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
Ultra High Performance 14-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
Thick oxide library - TSMC 22nm ULP / ULL,
Ultra High Density 6.5-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
Ultra High Density and Ultra Low Power 7-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
High Performance and High Density 9-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
High Performance & High Density 10 - track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
Ultra High Performance 14-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
Thick oxide library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP
Ultra High Density 6-track Standard Cell library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G, supports 40/45/50nm channel length
Ultra High Density and Ultra Low Power 7-track Standard Cell library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G, supports 40/45/50nm channel length
High Performance and High Density 10-track Standard Cell library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G, supports 40/45/50nm channel length
Thick oxide library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G
Ultra High Density 6-track Standard Cell library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP, supports 60/65/70nm channel length
Ultra High Density 7 - track Standard Cell library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP, supports 60/65/70nm channel length
High Performance & High Density 10 - track Standard Cell library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP, supports 60/65/70nm channel length
Thick oxide library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP
Ultra High Density 6-track Standard Cell library - TSMC 65nm 65LP LP / GP / ULP, supports 60/65/70nm channel length
Ultra High Density, 6nm channel length, 51nm poly pitch TSMC 4nm 4FF/4P
Ultra High Density, 6nm channel length, 57nm poly pitch TSMC 4nm 4FF/4P
High Performance & High Density, 6nm channel length, 51nm poly pitch TSMC 4nm 4FF/4P
High Performance & High Density, 6nm channel length, 57nm poly pitch TSMC 4nm 4FF/4P
Thick oxide library TSMC 4nm 4FF/4P
Ultra High Density, 3nm channel length, 48nm poly pitch TSMC 3nm
High Performance & High Density, 3nm channel length, 48nm poly pitch TSMC 3nm
Ultra High Density, 3nm channel length, 54nm poly pitch TSMC 3nm
Thick oxide library TSMC 3nm
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 6nm 6FF
HSTL I/O Interface - TSMC 12nm 12FFC,FFC+
SDRAM DDRx & LPDDR4x Host Controller & PHY - TSMC 12nm 12FFC,FFC+
SDRAM DDRx & LPDDR4x Hardened PHY - TSMC 12nm 12FFC,FFC+
DDRx & LPDDRx DRAM Memory Controller - TSMC 12nm 12FFC,FFC+
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 0.13um LV,LVOD
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 0.13um LV,LVOD
2.5V DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 0.13um LV,LVOD
2.5V DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 0.13um LV,LVOD
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 16nm 16FFC,FF
DDRx & LPDDRx DRAM Memory Controller - TSMC 16nm 16FFC,FF
SDRAM LPDDR5/4x/4/3/2 Host Controller & PHY - TSMC 16nm 16FFC,FF
HSTL I/O Interface - TSMC 16nm 16FFC,FF
1.8V, 2.5V Secondary Oxide DDRx/LPDDRx combo IO interface - TSMC 22nm 22ULP,ULL
DDRx/LPDDRx Memory Controller - TSMC 22nm 22ULP,ULL
1.8V, 2.5V secondary oxide DDRx/LPDDRx PHY - TSMC 22nm 22ULP,ULL
1.8V, 2.5V Secondary Oxide DDRx/LPDDRx combo IO interface - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
DDRx/LPDDRx Memory Controller - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
1.8V, 2.5V secondary oxide DDRx/LPDDRx PHY - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
DDRx & LPDDRx DRAM Memory Controller - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
1.8V Secondary Oxide DDRx & LPDDRx Combo I/O Interface - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
1.8V,2.5V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
DDRI/II/III SSTL/HSTL combo interface with/without RTT (rectangle) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm 65GP,LP,LP_EMF
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 65nm 65GP,LP,LP_EMF
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 65nm 65GP,LP,LP_EMF
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 65nm 65GP,LP,LP_EMF
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 65nm 65GP,LP,LP_EMF
3.3V Secondary Oxide DDRI/II/MDDR combo interface - TSMC 65nm 65GP,LP,LP_EMF
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 7nm 7FF,FF+
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 80nm 80GC,LP_EMF
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 80nm 80GC,LP_EMF
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 80nm 80GC,LP_EMF
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 80nm 80GC,LP_EMF
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 90nm 90G,GT,LP
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 90nm 90G,GT,LP
3.3V Secondary Oxide DDRI/II/MDDR combo interface - TSMC 90nm 90G,GT,LP
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 90nm 90G,GT,LP
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm 90G,GT,LP
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm 90G,GT,LP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 90nm 90G,GT,LP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 80nm 80GC,LP_EMF
1.8V secondary oxide DDRx/LPDDRx PHY - GF 28LP
1.8V Secondary Oxide DDRx/LPDDRx PHY - UMC 40nm 40ULP
SDRAM DDR4/3/2 Host Controller & PHY
SDRAM LPDDR5/4x/4/3/2 Host Controller & PHY
1.8V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF - 1.8V UMC 40ULP
2.5V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF - 1.8V UMC 40ULP
2.5V Secondary oxide DDRx PHY - TSMC 65nm 65GP,LP,LP_EMF
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 16nm
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 16nm FFC
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 16nm FFC+
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 28nm
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 28nm LP
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 28nm ULP
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 40nm
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 40nm G
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 40nm LP
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 40nm LP_EMF
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 40nm ULP
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 40nm ULP_EMF
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm GP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm LP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm LP_EMF
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm ULP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm ULP_EMF
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm GP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm LP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm ULP
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm ULP_EMF
SDRAM DDR4/3/2 & LPDDR4/3/2 Hardened PHY - TSMC 7nm
40ULP LPDDR4 PHY
Hardened DDRx & LPDDRx SDRAM PHY - TSMC 40nm 40G 40LP 40ULP
1.8V secondary oxide DDRx/LPDDRx PHY - TSMC 28nm 28HPM
2.5V secondary oxide DDRx/LPDDRx PHY - TSMC 28nm 28HPM
1.8V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G
2.5V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G
1.8V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40LP
2.5V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40LP
2.5V Secondary oxide DDRx PHY - TSMC 65GP
DDRx & LPDDRx Combo I/O Interface - TSMC 28nm 28HP, 28HPx, 28LP, 28ULP
DDRx & LPDDRx Combo I/O Interface - TSMC 40nm 40G 40LP 40ULP
DDRx & LPDDRx Combo I/O Interface - TSMC 16nm, 28nm, 40nm, 55nm, 65nm
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 55nm GP (CLN55GP)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 55nm GP (CLN55GP)
DDRI/II/MDDR combo interface - TSMC 55nm GP (CLN55GP)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 55nm GP (CLN55GP)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 55nm GP (CLN55GP)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 65nm GP (CLN65GP)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 65nm GP (CLN65GP)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 65nm GP (CLN65GP)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 65nm GP (CLN65GP)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 65nm LP (CLN65LP)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 65nm LP (CLN65LP)
DDRI/II/MDDR combo interface - TSMC 65nm LP (CLN65LP)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 65nm LP (CLN65LP)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 65nm LP (CLN65LP)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 80nm GC (CLN80GC)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 80nm GC (CLN80GC)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 80nm GC (CLN80GC)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 80nm GC (CLN80GC)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 90nm GT (CLN90GT)
DDRI/II/MDDR combo interface - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm GT (CLN90GT)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 90nm G (CLN90G)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 90nm G (CLN90G)
DDRI/II/MDDR combo interface - TSMC 90nm G (CLN90G)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 90nm G (CLN90G)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm G (CLN90G)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 90nm LP (CLN90LP)
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 90nm LP (CLN90LP)
DDRI/II/MDDR combo interface - TSMC 90nm LP (CLN90LP)
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 90nm LP (CLN90LP)
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm LP (CLN90LP)
DDRI/II/III SSTL/HSTL combo interface without RTT (rectangle) - TSMC 0.13um LV / LVod
DDRI/II/III SSTL/HSTL combo interface with RTT (rectangle) - TSMC 0.13um LV / LVod
DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 0.13um LV / Lvod
DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 0.13um LV / Lvod
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