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Single Port SRAM Compiler IP, UMC 40nm LP process UMC 40nm LP/LVT Single Port SRAM compiler with Power Gating & row redundancy....

402 0.118

Single Port SRAM Compiler IP, UMC 40nm LP process ULL Single Port SRAM with row redundancy, UMC 40nm LP process....

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Single Port SRAM Compiler IP, UMC 55nm eFlash process UMC 55nm eFlash Single Port SRAM compiler with Power Gating /HVT....

404 0.118

Single Port SRAM Compiler IP, UMC 55nm eFlash process UMC 55nm eFlash Single Port SRAM with row redundancy/HVT/Power Gating....

405 0.118

Single Port SRAM Compiler IP, UMC 55nm LP process UMC 55um LP Low-K process ULL Singal-Port SRAM compiler....

406 0.118

Single Port SRAM Compiler IP, UMC 55nm LP process UMC 55um LP Low-K process Singal-Port SRAM compiler with redundancy feature....

407 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm eFlash with peripheral HVT & redundancy Single Port SRAM....

408 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler....

409 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler....

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Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier....

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Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

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Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

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DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

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DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

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DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process...

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DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device...

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DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process...

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DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process...

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DDR2/MDDR Combo Command/Address Block ; UMC 0.13um HS/FSG Logic Process DDR2/MDDR Combo Command/Address Block ; UMC 0.13um HS/FSG Logic Process...

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DDR2/DDR1/MDDR Combo Command/Address Block ; UMC 65nm LP/RVT LowK Logic Process DDR2/DDR1/MDDR Combo Command/Address Block ; UMC 65nm LP/RVT LowK Logic Process...

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Command/address block of 1:2 DDR2-PHY ; 0.11um HS/AE (AL Advanced Enhancement) Logic Process Command/address block of 1:2 DDR2-PHY ; 0.11um HS/AE (AL Advanced Enhancement) Logic Process...

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1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process 1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...

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DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process...

424 0.118

DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process...

425 0.118

DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process...

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DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process...

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DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process...

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DDRII Data Block for Chip Application; UMC 0.11um HS/AE (AL Advance Enhancement) Logic Process DDRII Data Block for Chip Application; UMC 0.11um HS/AE (AL Advance Enhancement) Logic Process...

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DDR2/MDDR Combo PHY for Chip load usage ; UMC 65NM SP-RVT with 2.5V device LowK Logic Process DDR2/MDDR Combo PHY for Chip load usage ; UMC 65NM SP-RVT with 2.5V device LowK Logic Process...

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DDR2/MDDR COMBO PHY Data block for Chip usage ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR2/MDDR COMBO PHY Data block for Chip usage ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

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DDR2/MDDR PHY Data block ; UMC 65nm 1.0V with 2.5V device SP/RVT LowK Logic Process DDR2/MDDR PHY Data block ; UMC 65nm 1.0V with 2.5V device SP/RVT LowK Logic Process...

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DDR2/MDDR Combo PHY data block ; UMC 55nm SP process with 2.5V device DDR2/MDDR Combo PHY data block ; UMC 55nm SP process with 2.5V device...

433 0.118

DDR2/MDDR Combo Data Block ; 0.13um Logic HS/FSG Logic Process DDR2/MDDR Combo Data Block ; 0.13um Logic HS/FSG Logic Process...

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DDR2/DDR1/MDDR Combo Data Block ; UMC 65nm LP/RVT LowK Logic Process DDR2/DDR1/MDDR Combo Data Block ; UMC 65nm LP/RVT LowK Logic Process...

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Data block of 1:2 DDR2-PHY ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Data block of 1:2 DDR2-PHY ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...

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1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process 1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...

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DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process...

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DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process...

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DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process...

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DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process...

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DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process...

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DDRII Data Block for Chip Application; UMC 0.13um HS/FSG Logic Process DDRII Data Block for Chip Application; UMC 0.13um HS/FSG Logic Process...

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DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process...

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DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process...

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DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process...

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DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device...

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DDR3/2 COMBO PHY CMD/ADDR BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device DDR3/2 COMBO PHY CMD/ADDR BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device...

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UMC 55NM SP-RVT with 2.5V device DDR23 COMBO PHY CMD/ADDR Block for 2 layer PCB board usage UMC 55NM SP-RVT with 2.5V device DDR23 COMBO PHY CMD/ADDR Block for 2 layer PCB board usage...

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DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device for 2 layer PCB board usage DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device for 2 layer PCB board usage...

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Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process...