Design & Reuse
1878 IP
651
5.0
SPI Master / Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...
652
5.0
eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus)
The Digital Blocks DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI...
653
5.0
PDM-to-PCM Conversion with AMBA Interface
The AR36T01 is a soft macro low-power digital microphone interface modulator IP. The IP converts stereo/mono 1-bit pulse-density modulated (PDM) bit s...
654
5.0
SAS 4 Port 12G Recorder
The SAS Recorder IP Core provides an ready to use solution for high speed data recording applications. Simple interface guarantees fast time to marke...
655
5.0
SAS Initiator, 12G, 4 Ports, 48 Gbps, SATA Host
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
656
5.0
MIPI SPMI Controller or Target
The SPMI-CTRL core implements a highly featured, easy-to-use controller for the MIPI System Power Management Interface (MIPI-SPMI) bus. It supports th...
657
4.0
NVMe-to-SATA Bridge
The IntelliProp IPP-NV186A-BR is an NVMe-to-SATA Bridge that utilizes the IntelliProp NVMe Target IP Core and the IntelliProp SATA AHCI Host Core to c...
658
4.0
Gen-Z Responder IP Core
The IntelliProp IPC-GZ189A-DT Gen-Z Responder is an IP Core that allows the building of Gen-Z compliant media devices. The IPC-GZ189A-DT is compliant ...
659
4.0
Gen-Z Requester IP Core
The IntelliProp IPC-GZ190A-HI Gen-Z Requester is an IP Core that allows companies to build Gen-Z compliant Requester devices. The IPC-GZ190A-HI is com...
660
4.0
Gen-Z Physical Layer for 802.3 IP Core
The IntelliProp IPC-GZ196A-ZM Gen-Z Physical Layer for 802.3 is an IP Core that allows companies to attach a Gen-Z core to an 802.3 Phy. The IPC-GZ196...
661
4.0
Gen-Z Physical Layer for PCIe IP Core
The IntelliProp IPC-GZ197A-ZM Gen-Z Physical Layer for PCIe is an IP Core that allows companies to attach a Gen-Z core to a PCIe Phy. The IPC-GZ197A-Z...
662
4.0
Gen-Z Link Layer IP Core
The IntelliProp IPC-GZ198A-ZM Gen-Z Link Layer is an IP Core that allows companies to build Gen-Z compliant devices. The IPC-GZ198A-ZM is compliant wi...
663
4.0
SATA Host AHCI Core
The IntelliProp SATA Host AHCI (IPC-SA156A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables customers to use high throug...
664
4.0
SATA Bridge Platform (Optional: AES, Hardware Datapath)
The IntelliProp SATA Bridge Platform is an extensible IP Core which encompasses a SATA Device core, a SATA Host core, along with an embedded processor...
665
4.0
SAS 1-to-1 Speed Bridge with Sandbox
The IntelliProp SAS Bridge with Sandbox (IPP-SS115A-BR) design provides SAS compliant connections to a SAS host and a SAS device. The host and device ...
666
4.0
Gen-Z Switch IP Core
The IntelliProp IPC-GZ201A-ZM Gen-Z Switch is an IP Core that allows companies to build Gen-Z compliant components. The IPC-GZ201A-ZM is compliant wit...
667
4.0
DisplayPort Transmitter & Receiver
Logic Fruit Technologies has designed & implemented DISPLAY PORT Transmitter & Receiver IP Cores supporting multiple line rates up to 8.1Gbps. The IP ...
668
4.0
USB3.1 PHY
With sophisticated architecture and advanced technology, KNiulink USB3.1 transceiver IP with PMA and PCS layer is designed for low power and high perf...
669
4.0
CSI2 TX; Camera Serial Interface, MIPI Compliant
CSI2 – TX is part of HCL’s MIPI® compliant offerings. The CSI2 Transmitter IP supports Pixel Interface on the camera sensor side and the DPHY is suppo...
670
4.0
CSI2 RX; Camera Serial Interface, MIPI Compliant
The CSI2 Receiver IP Interfaces between Camera module which has the transmitter and the application processor. The CSI2 Receiver IP is fully compliant...
671
4.0
MIL1553B IP Core
MIL-STD-1553B defines specifications for terminal device operation and coupling, word structure and format, messaging protocol and electrical characte...
672
4.0
SATA Host Controller
HCLSATAHC26113G core handles data movement between system memory and a SATA device. The core implements transport layer & link layer functions. HCLSA...
673
4.0
I2C Controller (AMBA APB <-> I2C)
The I2C Controller provides access to devices with I2C interface. It accepts the Read / Write commands from APB and converts it to the serial I2C acce...
674
4.0
AHB Compliant Nand Flash Controller
NAND Flash Controller has a built-in AHB Slave Interface, handles all sorts of Nand Flash commands, address & data sequences. It allows the users to a...
675
4.0
AHB to APB Bridge
The AHB to APB bridge is an AHB slave, providing an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are...
676
4.0
DDR3 Controller IP
The AXI DDR3 Controller provides access to DDR3 memory. It accepts the Read / Write commands from AXI and converts it into DDR3 access. While doing th...
677
4.0
SAS Initiator Core
The IntelliProp IPC-SS105A-HI SAS Initiator Core is an industry standard Serial-SCSI (SAS) initiator core that enables host designs to connect to high...
678
4.0
SAS Target Core
The IntelliProp IPC-SS107A-DT SAS Target Core is an industry standard Serial-SCSI (SAS) Core that enables device applications to connect to high throu...
679
4.0
SATA "Y" RAID Bridge without NCQ
The IntelliProp IPP-SA112A-BR SATA “Y” Bridge with RAID design provides SATA compliant connections and a standard SATA interface that performs RAID0 t...
680
4.0
SATA Host App Core
IntelliProp’s SATA host core (IPC-SA101A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables host application companies to ...
681
4.0
SATA RAID Core
The IntelliProp IPC-BL109A-RD SATA RAID Core is a hardware design block written in HDL that performs RAID 0 operations to provide higher performance a...
682
4.0
SATA "Y" Bridge
The IntelliProp SATA "Y" Bridge design (IPP-SA111A-BR) provides SATA compliant connections per SATA-IO 3.3 and a standard SATA interface to access dri...
683
4.0
SATA Device ADCI Core
IntelliProp’s SATA Device ADCI core (IPC-SA155A-DT) is an industry standard Serial-ATA (SATA) device interface core that allows companies to build hig...
684
4.0
SATA 1-to-1 Speed Bridge with Sandbox
The IntelliProp SATA 1-to-1 Speed Bridge with Sandbox (IPP-SA110A-BR) design provides SATA compliant connections to a SATA host and a SATA device. The...
685
4.0
I2C Master Controller
The ntI2C_M is an I2C-bus multi-master interface controller and provides a cost-effective solution for a wide range of applications that require a low...
686
4.0
USB 3.0 Hub
...
687
4.0
AHB Cache Controller Core
The CACHE-CTRL IP core is a flexible cache memory controller providing a 32-bit slave AHB processor interface and a 32-bit master AHB interface to the...
688
3.0
ChaCha20 stream cipher core
The eSi-CHACHA20 core is an easy to use CHACHA20 stream cipher hardware accelerator that is compliant with the IETF RFC7539 standard. ChaCha20, along...
689
3.0
Combined ChaCha20 and Poly1305 core
The eSi-CHACHA20-POLY1305 core is an easy to use APB hardware accelerator peripheral that is fully compliant with the IETF RFC7539 standard Poly130...
690
3.0
Poly1305 core
The eSi-POLY1305 core is an easy to use POLY1305 accelerator peripheral that is fully compliant with the RFC7539 IETF standard. Poly1305, along with...
691
3.0
Single Lane and Quad Lane 16Gbps PCIe4.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN4.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
692
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
693
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in GF 28SLP process
TERMINUS-CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single &Quad-Lane PCI Express PHY that supports PCI Express protocol and...
694
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY in Samsung 28LPP process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
695
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 65G process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
696
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
697
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in GF 28SLP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol a...
698
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
699
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
700
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...