401 10.0

MIPI D-PHY Transmitter/Receiver for DSI/CSI-2 Samsung 28nm FD-SOI The Renesas MIPI D-PHY Transmitter/Receiver is useful 4 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of Samsung 28nm FD-SOI process....

402 10.0

MIPI D-PHY Transmitter/Receiver for TSMC 40nm LP The Renesas MIPI D-PHY Transmitter/Receiver is useful 2 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of TSMC 40nm LP process....

403 10.0

PCIe Gen2 PHY * Endpoint or Root Complex * PIPE includes skip insertion, deletion * PCIe power savings modes * Port bifurcation support...

404 10.0

ARM HSSTP PHY with Link Layer The VSG3ST6 is an enhanced simplex High-Speed STP macro with data transfer capabilities of up-to 6.25/12.5Gbps. It includes a Standard ARM HS-STP simp...

405 10.0

SATA 3 PHY Gigacom's VSL340A PHY updated version of VSL340 to support SATA3 and backward compatible with SATA 1 and 2. VSL340A is suitable for both Host and Devi...

406 10.0

MIPI D-PHY TSMC 130nm Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...

407 10.0

AMBA AXI Target The "advanced extensible interface" (AXI) bus is a high-performance parallel bus that connects on-chip peripheral circuits (or IP blocks) to processor...

408 10.0

AMBA AHB Target AMBA AHB is a bus interface designed for high-performance synthesizable applications. It specifies the interface between components such as initiator ...

409 10.0

PCIe 4.0 PHY With sophisticated architecture and advanced technology, KNiulink SerDes PHY IP with PMA and PCS layer is designed for low power and high performance ...

410 10.0

MIPI M-PHY Designed For TSMC 28nm ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A...

411 10.0

USB 2.0 femtoPHY in SMIC (40nm, 28nm) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

412 10.0

MIPI D-PHY TSMC 28nm HPC+ @ 2.5Ghz The Arasan’s MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Inte...

413 10.0

USB 2.0 femtoPHY in UMC (28nm, 22nm) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

414 10.0

USB 2.0 femtoPHY in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, 10nm, N7, N6, N5, N3P) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

415 10.0

MIPI M-PHY G4 Designed For TSMC 28nm HPC+ ACS-AIP-MPHY-28HPC+ MIPI Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. ...

416 10.0

D-phy 1.2 on tsmc 22nm with ultra low power Arasan Chip Systems announces the immediate availability its MIPI D-PHY IP supporting speeds of upto 2.5 gbps for TSMC 22nm SoC designs. The MIPI D-...

417 10.0

MIPI I3C PHY I/O Arasan’s MIPI I3CⓇ PHY I/O IP, in compliance with MIPI I3CⓇ specifications v1.1. Arasan’s MIPI I3CⓇ PHY IP is part of Arasan’s Total IP Solution for M...

418 10.0

USB 2.0 femtoPHY in Samsung (14nm, 11nm, 8nm, 7nm, 5nm, SF4X) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

419 10.0

USB 2.0 nanoPHY in TSMC (65nm, 55nm, 40nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

420 10.0

USB 2.0 nanoPHY in UMC (65nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

421 10.0

SPD5118 Hub Controller IP The SPD5 Hub function controller IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temperature Sen...

422 10.0

USB 2.0 picoPHY in TSMC (40nm, 28nm) The Synopsys USB 2.0 picoPHY provides designers with a complete physical (PHY) layer IP solution, designed for low power mobile and consumer applicati...

423 10.0

USB 2.0 picoPHY in UMC (40nm, 28nm) The Synopsys USB 2.0 picoPHY provides designers with a complete physical (PHY) layer IP solution, designed for low power mobile and consumer applicati...

424 10.0

USB 3.0 femtoPHY in GF (28nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

425 10.0

USB 3.0 PHY IP, Silicon Proven in TSMC 22ULP The USB 3.0 PHY IP Core is a transceiver provided for supplementary devices, compliant with UTMI (USB SuperSpeed), USB 3.0, and USB 2.0 PIPE requireme...

426 10.0

MIPI D-PHY Tx IP, Silicon Proven in TSMC 7FF Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...

427 10.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 7 FF Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...

428 10.0

MIPI I3C Basic Secondary Controller The I3C-SC core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Secondary Controller core compliant with the latest MIPI I3C Basi...

429 10.0

USB 3.0 femtoPHY in SMIC (28nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

430 10.0

MIPI D-PHY Universal IP in TSMC 16FFC for Automotive The MXL-DPHY-UNIV is a high-frequency low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v1....

431 10.0

AMBA APB Target Advanced Peripheral Bus (APB) is one of the Advanced Microcontroller Bus Architecture (AMBA) family protocols. It is a low-cost interface that is desi...

432 10.0

Wishbone Target The Wishbone System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores is a versatile design approach for semiconductor IP cores. Its go...

433 10.0

Avalon Target Avalon interfaces make system design easier by allowing you to connect components in Intel FPGAs. The Avalon interface family defines interfaces that ...

434 10.0

TileLink Target TileLink is a chip-scale connection standard that enables many masters to have synchronised memory mapped access to memory and other slave devices. Ti...

435 10.0

Bus Decoders Decoder logic controls numerous targets based on input from the initiator. It determines/decodes which target component will handle the current bus tr...

436 10.0

Bus Bridges Various bus types of protocols are available and employed in many applications, all of which require a bridge to operate safely and without loss of da...

437 10.0

Bus Convertors The bus converter module transforms 64-bit wide initiator data buses to smaller 32-bit target data buses or vice-versa. The downsizer module cuts the ...

438 10.0

Crossbars Interconnect An interconnect component connects initiators and targets in a system. A single initiator system simply requires a decoder and multiplexor, which are ...

439 10.0

MIPI C-PHY/D-PHY Combo DSI TX (Transmitter) IP in TSMC 55G The MXL-CPHY-DPHY-DSI-TX is a high-frequency low-power, high-performance, physical Layer. The PHY is configured as a MIPI Master supporting display in...

440 10.0

MIPI DSI-2 Transmit Controller v1.0 The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile host processors using ...

441 10.0

ONFI 3.2 NAND Flash Controller The Arasan ONFI 3.2 compliant NAND Flash Controller IP Core is a full featured, easy to use, synthesizable design that is easily integrated into any S...

442 10.0

USB 3.0 femtoPHY in Samsung (14nm, 11nm, 10nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

443 10.0

I2C and SPI Master/Slave Controller The I2CSPI-CTRL is a compact and versatile serial interface controller supporting both SPI (Serial Peripheral Interface) and I2C (Inter-Integrated Cir...

444 10.0

MIPI D-PHY DSI TX+ (Transmitter) IP in Samsung 28FDSOI The MXL-DPHY-DSI-TX+ is a high-frequency low-power, source-synchronous, physical layer supporting the MIPI Alliance Specification for D-PHY v2.1, whic...

445 10.0

MIPI C-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP The MXL-CPHY-CSI-2-TX+ is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Master supporting ...

446 10.0

MIPI D-PHY Universal IP in TSMC 65GP The MXL-D-PHY-UNIV-T-65GP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...

447 10.0

USB 3.0 femtoPHY in TSMC (28nm, 22nm, 16nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

448 10.0

MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 22ULP The MXL-CDPHY-DSI-RX-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...

449 10.0

USB 3.0 femtoPHY in UMC (28nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

450 10.0

MIPI D-PHY CSI-2 TX (Transmitter) 2.5Gbps in TSMC 65LP The MXL-DPHY-2p5G-CSI-2-TX-T-65LP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...