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Industry Articles
Seamless integration of multicore embedded systems
(Thursday, November 30, 2017)
IPs for automotive application - Functional Safety and Reliability
(Monday, November 27, 2017)
Resolution of Interoperability challenges in Automatic Test Point insertion across different EDA vendors
(Monday, November 27, 2017)
The Secret to Building IP at the Cutting Edge
(Monday, November 20, 2017)
The Future of Microcontrollers
(Monday, November 20, 2017)
Securing IoT Devices can be Never-Ending
(Thursday, November 16, 2017)
Why is Analog increasingly important in the Digital Era?
(Thursday, November 16, 2017)
Overcoming Timing Closure Issues in Wide Interface DDR, HBM and ONFI Subsystems
(Monday, November 13, 2017)
eFPGA IP Density, Portability & Scalability
(Monday, November 13, 2017)
Evolving passive optical networks (PONs) demand FPGA design flexibility
(Wednesday, November 8, 2017)
Complex SoC Testing with a Core-Based DFT Strategy
(Wednesday, November 8, 2017)
Rapid SoC Proof-Of-Concept For Zero Cost
(Monday, November 6, 2017)
Ins and Outs of Assertion in Mixed Signal Verification
(Monday, November 6, 2017)
The Battle of Data center Interconnect Fabric
(Monday, October 30, 2017)
Lowering Barriers to Entry for ASICs
(Thursday, October 26, 2017)
Hot Chips Heralds Heterogeneity
(Monday, October 23, 2017)
Platform Software Verification Framework Solution for Safety Critical Systems
(Monday, October 23, 2017)
Smart Tracking of SoC Verification Progress Using Synopsys' Hierarchical Verification Plan (HVP)
(Monday, October 9, 2017)
Combining USB Type-C and DisplayPort support in portable implementations
(Monday, October 9, 2017)
What's The Best Way to Verify Your SSD Controller?
(Thursday, October 5, 2017)
Video content protection using secure embedded non-volatile memory for HDMI with HDCP
(Thursday, September 21, 2017)
Power Management for Internet of Things (IoT) System on a Chip (SoC) Development
(Tuesday, September 19, 2017)
Authentication Flash: Closing the Security Gap Left by Conventional NOR Flash ICs
(Monday, September 18, 2017)
Designing for safety and security in a connected system
(Thursday, September 14, 2017)
Reduce Time to Market for FPGA-Based Communication and Datacenter Applications
(Thursday, September 14, 2017)
Learning from the Next-Gen Firewall
(Wednesday, September 13, 2017)
The case for integrating FPGA fabrics with CPU architectures
(Monday, August 28, 2017)
Processor-In-Loop Simulation: Embedded Software Verification & Validation In Model Based Development
(Monday, August 28, 2017)
Improve FPGA project management/test by eschewing the IDE
(Thursday, August 24, 2017)
UVM Sequence Library - Usage, Advantages, and Limitations
(Monday, August 21, 2017)
Addressing Clock Tree Synthesis Challenges
(Monday, August 21, 2017)
Optimizing flash memory selection for automotive & other uses
(Monday, August 21, 2017)
Asynchronous reset synchronization and distribution - Special cases
(Monday, August 14, 2017)
The whys and hows of secure boot
(Monday, August 14, 2017)
A Gesture Toward Change
(Thursday, August 10, 2017)
Asynchronous reset synchronization and distribution - ASICs and FPGAs
(Monday, August 7, 2017)
Asynchronous reset synchronization and distribution - challenges and solutions
(Monday, July 31, 2017)
Improving Battery-Powered Device Operation Time Thanks To Power Efficient Sleep Mode
(Thursday, July 20, 2017)
Virtual Prototyping for Fault Analysis, Functional Safety
(Tuesday, July 18, 2017)
Formal Verification Has It Covered!
(Monday, July 17, 2017)
Generating High Speed CSI2 Video by an FPGA
(Monday, July 17, 2017)
Megatrends Drive 200mm Fab Renaissance
(Monday, July 17, 2017)
How to Reduce FPGA Logic Cell Usage by >x5 for Floating-Point FFTs
(Tuesday, July 11, 2017)
Can 10 Gbps Ethernet be an Embedded Design Solution?
(Monday, July 3, 2017)
Design & Verify Virtual Platform with reusable TLM 2.0
(Monday, July 3, 2017)
Context Based Clock Gating Technique For Low Power Designs of IoT Applications - A DesignWare IP Case Study
(Monday, July 3, 2017)
Addressing SRAM Verification Challenges
(Monday, June 26, 2017)
Power Optimization using Multi BIT flops and MIMCAPs in 16nm technology and below
(Monday, June 26, 2017)
Achieving FPGA Design Performance Quickly
(Monday, June 26, 2017)
In-Memory Computing Versus Data Center Networks
(Wednesday, June 21, 2017)
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