Design & Reuse
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2739 IP
1
200.0
ReRAM NVM in 130nm CMOS, S130
Weebit ReRAM (Resistive Random Access Memory), is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. R...
2
100.0
The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
SuperFlash® is SST’s patented and proprietary NOR flash technology. With 80B+ devices shipped, SuperFlash is the non-volatile memory of choice for ...
3
100.0
High-Density eMRAM Compiler TSMC 22ULL
The Synopsys Foundation IP optimized for the TSMC’s 22nm Ultra Low Leakage (ULL) process provides designers an extensive offering of high-speed, hi...
4
100.0
ONFI 4.2 Controller
Arasan Chip System’s (ACS) Open NAND Flash Interface (ONFI) Host Controller is designed to provide the next generation of high speed interaction wit...
5
100.0
TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
Universal LVDS-based interfaces supporting variety of Tx and Rx configurations....
6
100.0
TSMC GF LVDS Tx/Rx with optional CMOS I/O
Flexible I/O cell for data and clock applications that supports differential (and optionally single-ended) Tx and Rx capabilities with no external com...
7
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
8
50.0
Ultra High-Speed Cache Memory Compiler
Silvaco’s Ultra High-Speed cache memory is an adaptable, independent, non-coherent cache Intellectual Property (IP) featuring an advanced cache ...
9
50.0
ONFI 3.2 NV-DDR2 PHY in GDSII
Compliant to ONFI 3.2 electrical interface, Arasan ONFI 3.2 PHY, delivered in hard macro, is process technology proven and easy to integrate. This ON...
10
50.0
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
11
44.0
CodaCache® Last Level Cache IP
CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...
12
40.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm FDX ...
13
40.0
Single port SRAM Compiler - low power retention mode
Single Port SRAM Compiler with Low Power Retention Mode and Ultra Low Leakage...
14
30.0
Single port SRAM Compiler - low power retention mode
Silicon proven, qualified and in high volume production. Single Port compiler offers the lowest retention power on the market....
15
30.0
Ultra Low Voltage (ULV) SRAM
Mobile Semi delivers optimized, embedded SRAM solutions that are designed for the lowest operating voltages and lowest standby currents available in t...
16
25.0
Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrated portfolio of standa...
17
25.0
Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrated portfolio of standa...
18
25.0
Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrated portfolio of standa...
19
25.0
Duet Package of Embedded Memories and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4P)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrated portfolio of standa...
20
25.0
Duet Package of Embedded Memories and Logic Libraries for UMC (40nm, 28nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrated portfolio of standa...
21
25.0
LVDS IO handling data rate up to 50Mbps with maximum loading 60pF
KA16UGLVDS01ST001 is a LVDS IO handling data rate up to 50Mbps with a maximum loading of 60pF. The differential voltage swing can be programmable from...
22
21.0
Zero Additional Mask MTP
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analog...
23
21.0
Zero Additional Mask MTP IP, 2.2-5V 4kbit HHGrace 180BCD
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analo...
24
21.0
Zero Additional Mask MTP IP, 2.2-5V 4kbit Towerjazz 180 PM
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analo...
25
21.0
Next Generation Flash device enabling small size, low power and direct connection with digital circuit which opens up new possibiities
LEE Flash G2 (G2) is an innovative Flash IP offering unique features that no other Flash IP could offer. It is based on LEE Flash G1, which consists ...
26
21.0
Embedded flash IP, 1.32V/3V 90nm
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cost...
27
21.0
Embedded flash IP, 1.5V/5V 130BCD Plus
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm . G1 is best fit embedded flash IP to BCD nodes and it can ...
28
21.0
Embedded flash IP, 1.5V/5V 130nm
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cost...
29
20.0
MIPI D-PHY/LVDS Combo TX (Transmitter) for Automotive in Samsung 28FDSOI
The MXL-LVDS-DPHY-DSI-TX is a combo PHY that consists of a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI ...
30
20.0
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
31
20.0
Standard Cell Library in TSMC (12nm~180nm)
M31 provides a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cell library (GPSC), Ult...
32
20.0
NVM FTP Trim in SMIC (180nm, 110nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
33
20.0
NVM FTP Trim in TowerJazz (180nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
34
20.0
NVM FTP Trim in TSMC (180nm, 152nm, 150nm, 130nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
35
20.0
NVM MTP in GF (180nm, 55nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
36
20.0
NVM MTP in Samsung (130nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
37
20.0
NVM MTP in Silterra (180nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
38
20.0
NVM MTP in TSMC (180nm, 152nm, 65nm, 55nm, 40nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
39
20.0
NVM OTP in Dongbu (180nm, 150nm, 110nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
40
20.0
NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
41
20.0
NVM OTP in GF (180nm, 130nm, 65nm, 55nm, 40nm, 28nm, 22nm, 12nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
42
20.0
NVM OTP in Huali (40nm, 28nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
43
20.0
NVM OTP in SMIC (110nm, 65nm, 55nm, 40nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
44
20.0
NVM OTP in Tower (180nm, 110nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
45
20.0
NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
46
20.0
NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
47
16.0
On-chip protection against IEC61000-4-2 events
ESD solutions and Analog Pads * All voltage domains (0.85V to 5.0V) * Additional higher voltage ranges in BCD processes * High ESD levels (scal...
48
15.0
Library of LVDS IOs cells for TSMC 40LP
The nSIO2000_TS40LP_2V5_1V1 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.1V or 1.8V/1.1V, designed ...
49
15.0
Library of LVDS IOs cells for TSMC 65LP
The nSIO2000_TS65LP_2V5_1V2 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.2V or 1.8V/1.2V, designed ...
50
15.0
Single Rail SRAM GLOBALFOUNDRIES 22FDX
Ultra-low voltage logic designs using adaptive body biasing demand dense SRAM solutions which fully integrate in the ABB aware implementation and sign...