Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Videos
Subscribe to D&R SoC News Alert
English
Mandarin
Login
Catalog of SIP Cores
System on Chip design resources
Catalog of SIP Cores
System on Chip design resources
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Videos
Subscribe to D&R SoC News Alert
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller & PHY
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Design Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Industry Articles
Automatic Synthesis Tackles Power Tower
(Wednesday, March 17, 2004)
VoIP Design Tests Out 'GOLDEN EAR'
(Wednesday, March 17, 2004)
Single tool serves IC verification best
(Wednesday, March 17, 2004)
Reconfigurable scan lowers test costs
(Wednesday, March 17, 2004)
Software key to SoC design
(Wednesday, March 17, 2004)
Signal Integrity --> Diverse IP cranks noise control headaches
(Wednesday, March 17, 2004)
Signal Integrity --> Crosstalk complicates IP reuse
(Wednesday, March 17, 2004)
Signal Integrity --> Signal models fine-tune designs
(Wednesday, March 17, 2004)
Signal Integrity --> Multipoint standard boosts LVDS
(Wednesday, March 17, 2004)
Signal Integrity --> LVDS modeling techniques overcome Ibis inaccuracies
(Wednesday, March 17, 2004)
Signal Integrity --> LVDS extends utility of 1149.1 boundary scan test
(Wednesday, March 17, 2004)
Dream of interoperable IP butts up against reality
(Wednesday, March 17, 2004)
Security Chip Design Speeds on to Silicon
(Wednesday, March 17, 2004)
Designers urged to put logic check into code
(Wednesday, March 17, 2004)
Opinion: DSP vendors' focus shifting to software
(Wednesday, March 17, 2004)
Embedded start-ups at crossroads
(Wednesday, March 17, 2004)
Embattled gate array players pull out an ace
(Wednesday, March 17, 2004)
On-chip test generators said to be key to cost control
(Wednesday, March 17, 2004)
Porting Legacy Code to Net Processor Designs
(Wednesday, March 17, 2004)
ESC: Real-time analysis provides transport support for scan-based emulation
(Wednesday, March 17, 2004)
Developing memory-efficient DSP apps without assembly code
(Wednesday, March 17, 2004)
Infrastructure reveals a novel approach to re-use
(Wednesday, March 17, 2004)
ESC: Formal spec languages ensure design code quality
(Wednesday, March 17, 2004)
Open system platform accelerates SoC development
(Wednesday, March 17, 2004)
ESC: Setting up inspection for software quality
(Wednesday, March 17, 2004)
SoC stumbling blocks cataloged at DATE
(Wednesday, March 17, 2004)
Editorial: When the embedded system is a chip
(Wednesday, March 17, 2004)
Embedded EE Array Grows a BISTy Core
(Wednesday, March 17, 2004)
FPGA Is as Good as its Embedded Plan
(Wednesday, March 17, 2004)
Value of Verification Fits Survival Profile
(Wednesday, March 17, 2004)
Specialization seen hindering SoC progress
(Wednesday, March 17, 2004)
Reality hampers vision of interoperable IP cores
(Wednesday, March 17, 2004)
SoCs require a new verification approach
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Software debug shifts to forefront of design cycle
(Wednesday, March 17, 2004)
Co-Design for SOCs -> 'Ramping-up' for complex multiprocessing applications
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Designers face chip-level squeeze
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Blend of tools needed for verification
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Embedded SOC takes new codesign tricks
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Iterated co-design right for system ICs
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Executable models key to flexible design
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Minimizing risks with co-verification
(Wednesday, March 17, 2004)
Co-Design for SOCs -> System models replace hard prototypes
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Cycle-accurate model speeds design
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Threads provide speed and flexibility
(Wednesday, March 17, 2004)
Co-Design for SOCs -> Fresh test strategies needed for IP cores
(Wednesday, March 17, 2004)
Co-Design for SOCs -> On-chip support needed for SOC debug
(Wednesday, March 17, 2004)
SoCs: Supporting Socketization -> Socketization gets to core of plug-and-play IP
(Wednesday, March 17, 2004)
SoCs: Supporting Socketization -> Socketization process stocks design-reuse store
(Wednesday, March 17, 2004)
SoCs: Supporting Socketization -> Reuse goal : fast tapeouts
(Wednesday, March 17, 2004)
SoCs: Supporting Socketization -> Ready, set, reuse: A socketization primer
(Wednesday, March 17, 2004)
|
Previous
|
87
|
88
|
89
|
...
|
Next
|
Previous
