Industry Expert Blogs
A 20/20 View on 20-nm at TSMC's OIP Event in San Jose-October 8, 2012 |
Some of our R&D colleagues and I will be presenting at TSMC’s OIP (Open Innovation Platform) Event in San Jose on 20-nm. We will describe new compact models that bridge design and manufacturing at 20-nm; implementation of dual patterning aware modeling and extraction; and, the engineering challenges of meeting power, performance and area targets of analog and physical IP such as USB, PCI Express and DDR. These presentations will be on October 16th starting at 1.30pm.