Design & Reuse

Industry Expert Blogs

Accelerating Memory Debug

-
February 12, 2015

Following on his recent talk about Key Advantages of Synopsys Memory VIP Architecture, here Synopsys R&D Director Bernie DeLay talks about protocol-aware debug for memories: a single environment to simultaneously visualize transactions, state machines, and memory arrays

|youtubevideo:FFO5vtH6QDI|