I recently took a look at the current status and future direction of FinFET based logic processes in my Leading Edge Logic Landscape blog. I thought it would be interesting to take a similar look at FDSOI and to compare and contrast the two processes.

As a reminder from the Leading Edge Logic Landscape blog, I will be using a formula developed by ASML to take my pitch projections and turn them into "Standard Nodes" for comparison purposes (the formula is described in the leading edge blog).

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