At NVIDIA GTC 2026, the industry conversation continued its shift beyond incremental advances in chip design toward something more systemic—how complex AI-driven systems are engineered end to end.
Within that context, Cadence presented a clear and consistent perspective: The future of engineering lies in tightly integrated, AI-accelerated workflows spanning chips, systems, and infrastructure. Framed as "The New Engineering Stack for Accelerated Computing and Agentic AI," this was less a forward-looking vision and more a reflection of capabilities already taking shape across design and simulation environments.
A Consistent Message: The Confluence of AI, Compute, and Physics
In the keynote pregame, Dr. Anirudh Devgan, president and CEO of Cadence, outlined the structural changes underway in engineering workflows:
- AI is becoming embedded within engineering engines, rather than functioning as an external layer.
- Simulation is scaling with compute, enabling significantly larger and more complex design exploration.
- Digital twins are evolving into operational tools that support real-time analysis and optimization.
Together, these shifts point toward a more integrated and autonomous approach to engineering, one that is increasingly aligned with the scale and complexity of modern AI systems.
Booth Narrative: A Unified Engineering Continuum
Cadence's booth experience brought these ideas together under the theme "AI-Accelerated Design – From AI Factories to Molecular Discovery."
The strength of the narrative lay in its continuity. Rather than presenting isolated capabilities, Cadence connected multiple domains into a single engineering framework:
- Semiconductor and advanced packaging design
- System-level analysis and multiphysics simulation
- AI infrastructure and data center design
- Molecular modeling and scientific applications
This cross-domain approach reflects a broader industry requirement: Engineering challenges are no longer confined to a single layer of abstraction; they span the entire system.
Technical Sessions and Thought Leadership
This message was reinforced through panel discussions, technical sessions, and demonstrations.
Panel: Planetary-Scale AI Infrastructure
Vivek Mishra, corporate VP at Cadence, participated in a panel on
"How to Build Planetary-Scale AI Infrastructure."
The discussion addressed practical considerations in scaling AI infrastructure, including:
- Power delivery and thermal management
- Reliability at hyperscale
- The role of simulation and digital twins in reducing deployment risk
This session is available on demand, extending access to a broader audience.
Technical Session: AI-Accelerated Design
Rob Knoth, senior group director, Strategy and New Ventures at Cadence, presented
"AI-Accelerated Design: From Hyperscale Data Centers to Molecular Discovery."
The session focused on how GPU-accelerated simulation and AI integration are improving:
- Design convergence
- Cross-domain interoperability
- Scalability of engineering workflows
The presentation is available on demand, providing a deeper technical perspective.
Demo 1: AI-Driven Design Across Domains
The "AI for Design: Chips, Systems, and Molecular Design Accelerated" demo illustrated how AI is being integrated directly into design and simulation workflows.
Built on the Cadence Millennium M2000 Supercomputer, the demonstration unified IC and advanced packaging design, system-level simulation, and molecular modeling.
This represents a shift from sequential workflows to more integrated, feedback-driven design processes.
Demo 2: Digital Twins for AI Infrastructure
The second demo, "Design for AI: Scaling AI Factory Digital Twin Design," focused on infrastructure-level challenges.
Using the Reality Digital Twin Platform with NVIDIA Omniverse libraries, Cadence demonstrated how AI factories can be modeled prior to construction, simulated under realistic workload conditions, and optimized for performance, energy efficiency, and reliability.
This capability is particularly relevant as AI infrastructure scales to increasingly large deployments, where early design decisions have significant cost and operational implications.
Ecosystem Engagement and Validation
Cadence's participation extended beyond its own activations. Across announcements and media coverage, the company was working within a broader ecosystem focused on integrating AI into engineering and manufacturing workflows.
Customer engagement and validation from organizations such as Micron Technology, Honda R&D, and Larsen & Toubro highlighted real-world applications across semiconductor, automotive, and industrial domains.
Key Takeaways
Several themes emerged from Cadence's presence at GTC:
- Engineering workflows are becoming AI-integrated by design: AI is increasingly embedded within core simulation and design processes.
- The scope of design is expanding: From components to systems to full-scale infrastructure.
- Digital twins are transitioning toward operational use: Supporting predictive analysis and continuous optimization.
- Integration across domains is critical: Effective engineering now depends on the ability to connect traditionally separate workflows.
Looking Ahead to CadenceLIVE
GTC 2026 underscored a clear direction for the industry. Cadence's presence at GTC reflects both the progress made and the opportunities ahead in shaping this next phase of engineering.
As system complexity continues to increase, the ability to unify design, simulation, and AI within a coherent engineering stack will be a key determinant of efficiency and innovation. For Cadence, the focus is on enabling a more connected, AI-driven approach to engineering—one that spans from silicon design to AI infrastructure and beyond.
Want to hear what Dr. Anirudh Devgan has to say about the future of Design for AI and AI for Design and learn more about Cadence's partnership with NVIDIA via a fireside chat with Jensen Huang?
Come and see us at CadenceLIVE Silicon Valley 2026!