Design & Reuse
3 IP
1
1.0
VeriSilicon GSMC 0.18um General Process, Low Power circuit design, Diffusion ROM
VeriSilicon GSMC 0.18um Synchronous Low Power Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic/A...
2
1.0
VeriSilicon SMIC 0.13um Syn. LP DROM Compiler, Memory Array Range:128 to 1Mega Bits
VeriSilicon SMIC 0.13um synchronous programmable Low Power diffusion ROM compiler optimized for Semiconductor Manufacturing International Corporation ...
3
1.0
VeriSilicon SMIC 0.18um LL Pro Syn. LP DROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Low Power Diffusion ROM compiler optimized for Semiconductor Manufacturing International Corpo...