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69 IP
1
3.0
A Wirebond and FlipChip compatible <80fF ESD Solutions for Multi-Gigabit SerDes Applications.
This silicon-proven TSMC 28nm Digital I/O Library delivers a low-capacitance, high-reliability interface solution optimized for advanced semiconductor...
2
3.0
TSMC RF ESD specifiically targeting low capacitance ESD
RF ESD specifically targetting low capacitance ESD protection strategies. It is not a full IO Library, but a collection of standalone ESD cells. ESD t...
3
3.0
5V Library for Generic I/O and ESD Applications TSMC 12nm FFC/FFC+ process.
This library is a base set of ESD protection structures for I/O and Power supplies. The design targets up to 8A applications (>8kV HBM).The I/Os are d...
4
2.0
7 way DDR combo
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and the ...
5
2.0
3.3V 100MHz Oscillator I/O Pad Set
The 3.3V 100MHz Oscillators library includes a programmable oscillator macro I/O cell. â–ª 100 MHz programmable oscillator These libraries are o...
6
2.0
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillator library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is provided...
7
2.0
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...
8
2.0
3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...
9
2.0
2.5V 100MHz Oscillator Staggered I/O Pad Set
The OSx_BI_032_12V oscillator is designed to generate an asynchronous on-chip clock signal with an appropriate external oscillator crystal. The design...
10
2.0
6.5V ESD Clamp in 180nm Technology
Standalone 6.5V ESD Power Clamp in 180nm technology for use in wirebond or flipchip....
11
2.0
1.8V Programmable 100MHz Oscillator I/O Pad Set
The Oscillators library provides a programmable oscillator for on-chip asynchronous clock generation with an appropriate external crystal. This oscil...
12
2.0
I2C I/O Pad Set
The I2C libraries provide the bidirectional I/O for two-line serial communication per Rev. 4 of the I2Cbus industry specification. The design is compa...
13
2.0
I2C I/O Pad Set
The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface. It is compliant with the I2C-bus specification â...
14
2.0
I2C I/O Pad Set
The I2C libraries provide the bidirectional I/O for two-line serial communication per Rev. 4 of the I2Cbus industry specification. The design is compa...
15
2.0
I2C IO Pad Set
The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface. It is compliant with the I2C-bus specification â...
16
2.0
I2C IO Pad Set
The I2C library provides the bidirectional I/O for two-line serial communication per Rev. 4 of the I2C-bus industry specification. The design is comp...
17
2.0
I2C IO Pad Set
...
18
2.0
ICC I/O Pad Set
The ICC library provides the bidirectional reset, clock, and data I/O drivers for the smart card UICC terminal interface. This library has been desi...
19
2.0
PCI IO Pad Set
The PCI 3.0 library provides the driver / receiver and required support cells for PCI 3.0 signaling. The cells are compliant with the PCI Local Bus S...
20
2.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell for SD 3.0 signaling. The library is compliant with the SD Specifications, Part 1, Physical Layer S...
21
2.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling. Fault-tolerant operation. This library is offere...
22
2.0
DDR3 / DDR4 Combo I/O Pad Set
The DDR3 / DDR4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full compleme...
23
2.0
DDR3_DDR4 IO Pad Set
The DDR3 / DDR4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full compleme...
24
2.0
RF I/O Pad Set and Discrete RF ESD Protection Components
The RF libraries include analog signal pads and ESD protection components for RF applications. These libraries are offered as a supplement to the stan...
25
2.0
RF I/O Pad Set and Discrete RF ESD Protection Components
The RF library include analog signal pads and ESD protection components for RF applications. This library is offered as a supplement to the IO librar...
26
2.0
RGMII / GMII Combo I/O Pad Set
The (R)GMII libraries provide the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigab...
27
2.0
RGMII IO Pad Set
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigabi...
28
2.0
RGMII IO Pad Set
The (R)GMII / SMII Combo library provides the driver / receiver cell for GMII, RGMII, and SMII signaling along with a full complement of I/O power, co...
29
2.0
CI Plus
The CI Plus library provides a programmable bi-directional I/O cell designed to meet the signal interface requirements of the Common Interface. This l...
30
2.0
SMBus IO Pad Set
The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface. It is compliant with the Rev 3.1 ...
31
2.0
CML I/O Pad Set
The CML library provides a differential clock driver, a voltage reference, and power cells to support REFCLK signaling for PCIe applications....
32
2.0
CML I/O Pad Set
The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along with a CML voltage refe...
33
2.0
ONFI 4.1 I/O Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to supp...
34
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
35
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
36
2.0
ONFI_4 IO Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
37
2.0
ONFI_4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
38
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
39
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
40
2.0
USB 2.0 OTG ESD Protection I/O Pad Set
The USB 2.0 OTG ESD Protection library provides a comprehensive ESD solution for USB 2.0 hard macro cells....
41
2.0
ESD Protection
The ESD Protection library provides ESD protection components. In addition to core-placeable ESD protection cells, discrete components (RF diodes and ...
42
2.0
HSTL I/O Pad Set
The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and differential signalin...
43
2.0
SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
The DDR2 / DDR3 library includes the combo driver / receiver cells and a full complement of power and support cells for both single-ended and differen...
44
2.0
SSTL_ I/O Pad Set
The SSTL_2 pad set is a full complement of I/O, power, and spacer cells (total of 14 cells) that are necessary to assemble a padring by abutment. Sinc...
45
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15_18 combo pad set supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with embe...
46
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15 / SSTL_18 library supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with emb...
47
2.0
SSTL_15 IO Pad Set
The SSTL_15 pad set supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, ar...
48
2.0
SSTL_15 IO Pad Set
The SSTL_15 library supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, are...
49
2.0
subLVDS I/O Pad Set
The subLVDS library provides a subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data...
50
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...