Design & Reuse
2786 IP
2601
0.0
4608x12 Bits OTP (One-Time Programmable) IP, TSM- 40ULP 0.9V/2.5V Process
The ATO4608X12TS040ULP7ZA is organized as 4608 x 12 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP sta...
2602
0.0
666 Mbps LVDS Transceiver IP
The MXL-TXRX-LVDS is a LVDS transceiver implemented in digital CMOS technology. It supports up to 666 Mbps. It is compatible with IEEE Std 1596, EIA-6...
2603
0.0
768 x 1 Bits One Time Programmable Device D- Hite- Mixed-Signal 110 nm 1.2V/3.3V Process
The ATO00768X1DB110SBM2NA is organized as 768 bits by 1 one-time programmable in 1-bit read and 1-bit program modes. This is a kind of non-volatile m...
2604
0.0
768x1 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE
The AT768X1U110MAE0AA is organized as 768 bits by 1 one-time programmable in 1-bit read and 1-bit program modes. This is a kind of non-volatile memor...
2605
0.0
768x3 Bits OTP (One-Time Programmable) IP, UM- 142 nm 1.8V/3.3V CIS
The AT768X3U142CIS0AA is organized as 768-bits by 3 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in 0.142...
2606
0.0
768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NL is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....
2607
0.0
36Kbyte EEPROM IP with configuration 32p32w288bit and oscillator
130GF_EEPROM_07 is a nonvolatile electrically erasable programmable read-only memory with volume 36Kbyte (32(bit per word) x 32(words per page) x 288(...
2608
0.0
16x16 Bits OTP (One-Time Programmable) IP, SMI- 0.18μm BCDM 1.8V/5V process
The ATO0016X16SM180BS33NA is organized as 16 bits by 16 one-time programmable (OTP) in 16-bit read and 1-bit program modes. This is a kind of non-vola...
2609
0.0
16x8 Bits OTP (One-Time Programmable) IP, TSM- CM018G 0.18μm 1.8V/3.3V Process
The ATO00016X8TS180CMG3NA is organized as 16 bits by 8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volati...
2610
0.0
16x8 Bits OTP (One-Time Programmable) IP, VI- 150nm 1.8V BCD Process
The ATO00016X8VI150BG22NA is organized as 16 bits by 8 one-time programmable in 8-bit read and 1-bit program modes. This is a kind of non-volatile m...
2611
0.0
16x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18um XH018 1.8V/3.3V process
The ATO00016X8XH18018P4DA is organized as a 16-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18µm XH018...
2612
0.0
PAD - HHGrace 110nm ULL
...
2613
0.0
Rail to rail LVDS receiver 1 Gbps
LVDS_RX is LVDS receiver with rail to rail input range. The interface to the core logic includes the output signal pin (OUTp) to receive data and the ...
2614
0.0
Half Precision IEEE-754R complete FPU for graphics processing
This block may be used to convert and existing single register stage into a stallable pipeline stage. It can also be used with synchronous RAM blocks...
2615
0.0
TCAM in SMIC 28HK+ upto 800Mbps
...
2616
0.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling. Fault-tolerant operation. This library is offere...
2617
0.0
3DIO PHY IP for TSMC N5
Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...
2618
0.0
DDR combo IO in SMIC 28HKC+, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2619
0.0
DDR combo IO in SMIC 28HKD 0.9/1.8V, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2620
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR2,3/LPDDR2,3, upto 1600Mbps for IOT application
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2621
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR3,4/LPDDR3,4, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2622
0.0
DDR combo IO in SMIC 40NLL, supporting DDR2,3/LPDDR2,3, upto 1333Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2623
0.0
DDR combo IO in SMIC 40NLL, supporting DDR3,3U,3L,4/LPDDR2,3, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2624
0.0
DDR combo IO in SMIC 55NLL, supporting DDR2/3/3L /LPDDR2/3, upto 1333Mbps
Brite DDR IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200Mbps to 4805Mbps. Brite p...
2625
0.0
IEEE 754 Floating Point Coprocessor
The A2F3 is a fully synthesizable module implemented in Verilog RTL. It is a co-processor unit providing floating-point computation compliant with th...
2626
0.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm...
2627
0.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's SP-ULD-GF22FDX-PLUS memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm F...
2628
0.0
Register File with low power retention mode, high speed pins on 1 side
Low Leakage. Mobile Semiconductor's Bulk 22 ULL Register file memory compiler generates single-port Register File instances using the Bulk 22ULL proce...
2629
0.0
Register, Configuration and Control Bus
A2R provides an interconnection mechanism between control registers in an ASIC design and any number of control devices; CPUs, debug ports etc.. The b...
2630
0.0
memBrain™ Tile
...
2631
0.0
Memory Compiler(12nm,16nm,22nm,28nm,40nm,55nm, 90nm, 115nm, 130nm, 150nm, 180nm)
M31 memory compilers are designed with high industrial standards to which provides the memory solutions for density, power, and performance optimizati...
2632
0.0
General Purpose I/O (GPIO)(12nm,16nm,22nm, 28nm, 40nm, 55nm, 90nm, 110nm, 130nm, 150nm,152nm, 180nm)
GPIO is a general-purpose input/output unit that provides basic input/output functionalities. M31 provides silicon-proven GPIO libraries in a variety ...
2633
0.0
Zero fall-through synchronous FIFO
Fully synchronous FIFO with zero fall-through such that when empty the FIFO behaves like a single stage register....
2634
0.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k
Foundry Sponsored - Metal programmable ROM compiler - TSMC 90 nm LPeF - Non volatile memory optimized for low power - compiler range up to 1024 k...
2635
0.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k
Metal programmable ROM compiler - TSMC 65 nm LP - Non volatile memory optimized for low power - compiler range up to 256 k...
2636
0.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k
Foundry Sponsored - Metal programmable ROM compiler - TSMC 130 nm BCD - Non volatile memory optimized for low power - compiler range up to 256 k...
2637
0.0
Metal programmable ROM compiler - Memory optimized for low power - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 130 nm G - Non volatile memory optimized for low power - Dual Voltage - compiler range up to 1024 k...
2638
0.0
Metal programmable ROM compiler - Non volitile memory optimized for low power - compiler range up to 256 k
Metal programmable ROM compiler - TSMC 130 nm BCD Plus - Non volatile memory optimized for low power - compiler range up to 256 k...
2639
0.0
IGALVDT11A, TSMC CLN28HPC+/HPC/HPM LVDS RX PHY [8ch]
The IGALVDT11A is a TSMC CLN28HPC+/HPC/HPM 8-channel LVDS receiver PHY, which is used mainly in baseband IC and RFIC communication. An internal deskew...
2640
0.0
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O...
2641
0.0
IGALVDT14A, TSMC CLN28HPC+ LVDS RX and CMOS Combo I/O
IGALVDT14A contains a receiver (RX) for LVDS interface and bi-derectional double CMOS. It supports the data rate up to 500Mbps. There is one macro ins...
2642
0.0
RGMII IO Pad Set
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigabi...
2643
0.0
Bi-Directional LVDS with LVCMOS
BiDirectional LVDS IO circuit combines LVDS driver and receiver circuits to enable a single pair of IO pads to function as a 1.5Gbps bi-directional LV...
2644
0.0
Library of LVDS IOs cells for TSMC 40G
The nSIO2000_TS40G_2V5_0V9 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/0.9V or 1.8V/0.9V, designed o...
2645
0.0
Library of LVDS IOs cells for TSMC 65GP
The nSIO2000_TS65GP_2V5_1V0 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.0V or 1.8V/1.0V, designed ...
2646
0.0
Library of LVDS Ios cells in HHGrace 130nm~55nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
2647
0.0
Library of LVDS Ios cells in HLMC 28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
2648
0.0
Library of LVDS Ios cells in SMIC 130nm~28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
2649
0.0
Library of LVDS Ios cells in TSMC 180nm~22nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
2650
0.0
Wide-range LVDS Video Interface
Flexible video deserializer capable of receiving 18bit, 24bit, and 30bit video data with embedded sync and control carried over four or five serial LV...