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2776 IP
401
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for high density and Low power - compiler range up to 640 k...
402
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and Low power - compiler range up to 640 k...
403
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler range up to 64 k
Single Port SRAM compiler - TSMC 130 nm BCD Plus - Memory optimized for ultra high density and high speed - compiler range up to 64 k...
404
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler up to 64 k
Foundry Sponsored - Single Port SRAM compiler - TSMC 130 nm BCD - Memory optimized for ultra high density and high speed - compiler up to 64 k...
405
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range up to 640 k
Foundry Sponsored - Single Port SRAM compiler - TSMC 85 nm UP - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range...
406
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and low power - compiler range up to 576 k
Single Port SRAM compiler - TSMC 40 nm LP - Non volatile Memory optimized for ultra high density and low power - compiler range up to 576 k...
407
2.0
Single Port SRAM compiler - Memory optimized for ultra low leakage and high density - Dual Voltage - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm uLL - Memory optimized for ultra low leakage - Dual Voltage - compiler range up to 640 k...
408
2.0
Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
Single Port SRAM compiler - TSMC 180 nm G - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k...
409
2.0
Pipelined Divider
Function y = a / b is a very high-speed divider with configurable dividend and divisor width. Inputs and outputs may be specified as either signed or...
410
2.0
Pipelined Multiplier
Function y = a * b is a high-speed multiplier with configurable width and depth. Inputs and outputs may be specified as either signed or unsigned val...
411
2.0
Pipelined Square Root
Function y = √x is a fully scalable square-root function with configurable data width. Inputs and outputs are unsigned integers. An n-bit inpu...
412
2.0
Flash Memory LDPC
LDPC corrects errors caused by flash storage failure mechanisms. The data is encoded while writing into the storage devices and it is decoded while re...
413
2.0
Floating-point Adder
High-speed fully pipelined 32-bit floating-point adder/subtracter based on the IEEE 754 standard. Results have a latency of 5 clock cycles. Ideal for...
414
2.0
Floating-point Divider
High-speed fully pipelined 32-bit floating-point divider based on the IEEE 754 standard. Features a generic latency from 2 to 49 clock cycles. Ideal ...
415
2.0
Floating-point Multiplier
High-speed fully pipelined 32-bit floating-point multiplier based on the IEEE 754 standard. Results have a latency of only 4 clock cycles. Ideal for ...
416
2.0
Floating-point Square-root
High-speed fully pipelined 32-bit floating-point square-root function based on the IEEE 754 standard. Features a generic latency from 2 to 24 clock cy...
417
2.0
Floating-point to Fixed-point Converter
Converts 32-bit floating-point numbers to fixed-point representation. The fixed-point output has a configurable word and fraction width. Floating-poin...
418
2.0
SMBus IO Pad Set
The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface. It is compliant with the Rev 3.1 ...
419
2.0
CML I/O Pad Set
The CML library provides a differential clock driver, a voltage reference, and power cells to support REFCLK signaling for PCIe applications....
420
2.0
CML I/O Pad Set
The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along with a CML voltage refe...
421
2.0
ONFI 4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
422
2.0
ONFI 4.1 I/O Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to supp...
423
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
424
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
425
2.0
ONFI_4 IO Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
426
2.0
ONFI_4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
427
2.0
Cosine Function
Function y = cos(x) calculates the cosine of an angle in radians. It has a high-speed, fully pipelined architecture and uses a polynomial with dynamic...
428
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
429
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
430
2.0
Arctan Function
Function y = atan(x) calculates the inverse tangent of a fraction. It has a high-speed, fully pipelined architecture and uses a polynomial with dynam...
431
2.0
USB 2.0 OTG ESD Protection I/O Pad Set
The USB 2.0 OTG ESD Protection library provides a comprehensive ESD solution for USB 2.0 hard macro cells....
432
2.0
ESD Protection
The ESD Protection library provides ESD protection components. In addition to core-placeable ESD protection cells, discrete components (RF diodes and ...
433
2.0
HSTL I/O Pad Set
The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and differential signalin...
434
2.0
SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
The DDR2 / DDR3 library includes the combo driver / receiver cells and a full complement of power and support cells for both single-ended and differen...
435
2.0
SSTL_ I/O Pad Set
The SSTL_2 pad set is a full complement of I/O, power, and spacer cells (total of 14 cells) that are necessary to assemble a padring by abutment. Sinc...
436
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15_18 combo pad set supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with embe...
437
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15 / SSTL_18 library supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with emb...
438
2.0
SSTL_15 IO Pad Set
The SSTL_15 pad set supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, ar...
439
2.0
SSTL_15 IO Pad Set
The SSTL_15 library supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, are...
440
2.0
subLVDS I/O Pad Set
The subLVDS library provides a subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data...
441
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...
442
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...
443
2.0
5V Programmable GPIO
The 5V General Purpose I/O libraries provide bidirectional I/O, analog I/O, and a full complement of I/O power, core power, and analog power cells alo...
444
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
445
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
446
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
447
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
448
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
449
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
450
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...