Design & Reuse
3 IP
1
3.0
9-bit, 1 GSPS Analog-to-Digital Converter IP block
The A9B1G is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block. It is a successive approx...
2
0.0
9bit upto 3Msps Ultra low power SAR ADC IP core
High performance, 9-bit resolution, upto 3 Msps sample rate Ultra Low Power Mixed-signal SAR ADC IP Core. Leading edge systems on chip (SoCs) for micr...
3
0.0
Dual core I & Q Analog to Digital Converter
This is a dual core I & Q Analog to Digital Converter based on the Time Interleaved SAR architecture. The IP includes a power supply regulator (LDO), ...