1 46.0

32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps. Error count is accurate: no double counts or omis...

2 46.0

32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7 or 15 order, up to 32Gbps. Error count is accurate: no double counts or omission...

3 46.0

32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 31 order, up to 32Gbps. Error count is accurate: no double counts or omissions reg...

4 40.0

All Silicon Charge Pump for X-FAB 180nm Fraunhofer IPMS offers an all silicon charge pump module which does not need any further external components. Efficiency is up to 97%....

5 12.0

Latch-Up Detector The ODT-LUP-2I3O-7T-A1 is a latch-up detection solution that can support integration into advanced FinFET process nodes such as N7. The IP works in...

6 12.0

General Purpose Voltage Buffer The ODT-OBF-ULP-DC-16FFCT is a voltage buffer with a high drive capability and is stable up to a 1nF output load. It can be used to daisy-chain volta...

7 10.0

Droop Detector - TSMC CLN3A Analog Bits’ Droop Detector macro addresses SOC power supply and other voltage droop monitoring needs in a fully integrated easy-to-use macro. The Dro...

8 10.0

Differential Output Buffer - TSMC CLN3E Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

9 10.0

Droop Detector - TSMC CLN3E Analog Bits’ Droop Detector macro addresses SOC power supply and other voltage droop monitoring needs in a fully integrated easy-to-use macro. The Dro...

10 10.0

Differential Clock Reciever - TSMC CLN3P Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

11 10.0

Differential Clock Reciever to CML - TSMC CLN3P Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

12 10.0

Differential Output Buffer - TSMC CLN3P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

13 10.0

Droop Detector - TSMC CLN3P Analog Bits’ Droop Detector macro addresses SOC power supply and other voltage droop monitoring needs in a fully integrated easy-to-use macro. The Dro...

14 10.0

Differential Output Buffer - TSMC CLN4P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

15 10.0

Droop Detector - TSMC CLN4P Analog Bits’ Droop Detector macro addresses SOC power supply and other voltage droop monitoring needs in a fully integrated easy-to-use macro. The Dro...

16 10.0

Glitch Detector - TSMC CLN4P Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...

17 10.0

Chip-to-Chip IO Buffer - TSMC CLN4P Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

18 10.0

Chip-to-Chip IO Buffer - TSMC CLN5A Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

19 10.0

Chip-to-Chip IO Buffer - TSMC CLN6FF Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

20 10.0

CML Buffer - TSMC CLN3A Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

21 10.0

CML Buffer - TSMC CLN3E Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

22 10.0

CML Buffer - TSMC CLN3P Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

23 10.0

CML Buffer - TSMC CLN4P Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

24 10.0

CML Buffer - TSMC CLN6 Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

25 10.0

CML Buffer - TSMC CLN5A Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

26 10.0

CML Buffer - TSMC CLN6FF Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

27 10.0

CML Buffer - TSMC CLN7FF Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...

28 10.0

CML Differential IO - TSMC CLN6FF Analog Bits’ CML to HCSL Differential IO Buffer macros provide a low noise, high performance differential output clock that is compatible with HCSL (H...

29 10.0

Differential Clock Receiver - TSMC CLN3A Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

30 10.0

Differential Clock Receiver - TSMC CLN3E Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

31 10.0

Differential Clock Receiver to CML - TSMC CLN3A Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

32 10.0

Differential Clock Receiver to CML - TSMC CLN3E Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

33 10.0

Differential Clock Receiver to CML - TSMC CLN6FF Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

34 10.0

Differential Output Buffer - TSMC CLN3P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

35 10.0

Glitch Detector - TSMC CLN3A Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...

36 10.0

Glitch Detector - TSMC CLN3E Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...

37 10.0

Glitch Detector - TSMC CLN3P Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...

38 10.0

Glitch Detector - TSMC CLN5A Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...

39 10.0

Chip-to-Chip IO Buffer - TSMC CLN5 Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

40 10.0

Chip-to-Chip IO Buffer - TSMC CLN7FF Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

41 10.0

Differential Clock Receiver - TSMC CLN2P Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

42 10.0

Differential Clock Receiver to CML - TSMC CLN2P Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

43 10.0

Differential Output Driver - TSMC CLN2P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

44 10.0

Droop Detector - TSMC CLN2P Analog Bits’ Droop Detector macro addresses SOC power supply and other voltage droop monitoring needs in a fully integrated easy-to-use macro. The Dro...

45 8.0

Low-power output buffer up to 15GHz in GF 22nmFDX InCirT's IAMPGF22FDX is a low-power output buffer capable of operating at frequencies up to 15 GHz. It supports both differential and single-ended loa...

46 7.0

MIPI RFFE Slave IP Core The MIPI RFFE Slave controller IP is a highly optimized and technology and PHY agnostic implementation of the MIPI RFFE v.3.1 standard targeting both ...

47 5.0

OPEN Alliance TC14 10BASE-T1S PMD Controller The CT25207, in combination with the CT25203, implements a complete OPEN Alliance TC14 10BASE-T1S PMD Interface. The IP’s tasks are: • perform th...

48 4.0

LVDS Transmitter The LVDS_TX is CMOS differential line transmitter designed for applications requiring ultra low power dissipation, low noise, and high data rates. The...

49 4.0

LVDS Receiver The LVDS_RX is CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The d...

50 4.0

High-speed clock receiver circuit operating up to 2.5 GHz with low output jitter. The ODT-CRX-2P5G-16 is a high-speed clock receiver circuit capable of operating up to 2.5 GHz with low output jitter. The CRX uses a high-speed signa...