Design & Reuse
5687 IP
2401
1.0
TSMC CL013LVOD 130nm DDR DLL - 116MHz-580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2402
1.0
TSMC CL013LVOD 130nm DDR DLL - 183MHz-915MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2403
1.0
TSMC CL013LVOD 130nm DDR DLL - 87MHz-435MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2404
1.0
TSMC CL013LVOD 130nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2405
1.0
TSMC CL013LVOD 130nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2406
1.0
TSMC CL013LVOD 130nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2407
1.0
TSMC CL013LVOD 130nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2408
1.0
TSMC CL013LVOD 130nm Spread Spectrum PLL - 110MHz-550MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2409
1.0
TSMC CL013LVOD 130nm Spread Spectrum PLL - 220MHz-1100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2410
1.0
TSMC CL013LVOD 130nm Spread Spectrum PLL - 440MHz-2200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2411
1.0
TSMC CL015G 150nm Clock Generator PLL - 130MHz-650MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2412
1.0
TSMC CL015G 150nm Clock Generator PLL - 260MHz-1300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2413
1.0
TSMC CL015G 150nm Clock Generator PLL - 65MHz-325MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2414
1.0
TSMC CL015G 150nm DDR DLL - 120MHz-600MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2415
1.0
TSMC CL015G 150nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2416
1.0
TSMC CL015G 150nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2417
1.0
TSMC CL015G 150nm Deskew PLL - 130MHz-650MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2418
1.0
TSMC CL015G 150nm Deskew PLL - 260MHz-1300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2419
1.0
TSMC CL015G 150nm Deskew PLL - 65MHz-325MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2420
1.0
TSMC CL015G 150nm Spread Spectrum PLL - 130MHz-650MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2421
1.0
TSMC CL015G 150nm Spread Spectrum PLL - 260MHz-1300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2422
1.0
TSMC CL015G 150nm Spread Spectrum PLL - 65MHz-325MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2423
1.0
TSMC CL015LV 150nm Clock Generator PLL - 140MHz-700MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2424
1.0
TSMC CL015LV 150nm Clock Generator PLL - 280MHz-1400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2425
1.0
TSMC CL015LV 150nm Clock Generator PLL - 70MHz-350MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2426
1.0
TSMC CL015LV 150nm DDR DLL - 120MHz-600MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2427
1.0
TSMC CL015LV 150nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2428
1.0
TSMC CL015LV 150nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2429
1.0
TSMC CL015LV 150nm Deskew PLL - 140MHz-700MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2430
1.0
TSMC CL015LV 150nm Deskew PLL - 280MHz-1400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2431
1.0
TSMC CL015LV 150nm Deskew PLL - 70MHz-350MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2432
1.0
TSMC CL015LV 150nm Spread Spectrum PLL - 140MHz-700MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2433
1.0
TSMC CL015LV 150nm Spread Spectrum PLL - 280MHz-1400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2434
1.0
TSMC CL015LV 150nm Spread Spectrum PLL - 70MHz-350MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2435
1.0
TSMC CL018E 180nm Clock Generator PLL - 130MHz-650MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2436
1.0
TSMC CL018E 180nm Clock Generator PLL - 260MHz-1300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2437
1.0
TSMC CL018E 180nm Clock Generator PLL - 65MHz-325MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2438
1.0
TSMC CL018E 180nm DDR DLL - 120MHz-600MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2439
1.0
TSMC CL018E 180nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2440
1.0
TSMC CL018E 180nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2441
1.0
TSMC CL018E 180nm Deskew PLL - 130MHz-650MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2442
1.0
TSMC CL018E 180nm Deskew PLL - 260MHz-1300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2443
1.0
TSMC CL018E 180nm Deskew PLL - 65MHz-325MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2444
1.0
TSMC CL018E 180nm Spread Spectrum PLL - 130MHz-650MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2445
1.0
TSMC CL018E 180nm Spread Spectrum PLL - 260MHz-1300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2446
1.0
TSMC CL018E 180nm Spread Spectrum PLL - 65MHz-325MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2447
1.0
TSMC CL018G 180nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2448
1.0
TSMC CL018G 180nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2449
1.0
TSMC CL018G 180nm Clock Generator PLL - 55MHz-275MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2450
1.0
TSMC CL018G 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...