Design & Reuse
5 IP
1
0.0
UMI™ for Die-to-Memory (D2M) PHY IP
Unlike fixed unidirectional die-to-die solutions, NuLink technology is able to deliver low-power and high-performance D2M solutions....
2
0.0
Innovative Ultra-High-Speed Chiplet Solution
Innosilicon INNOLINK™ IP provides a leading-edge chiplet solution allowing massive amounts of low-latency data to pass seamlessly between smaller chip...
3
0.0
Low Power Dual PHY for UCIe low cost robust Chiplets
YorChip UniPHY™ Dual PHY is a flexible version of YorChip's multi-protocol PHY which supports UCIe and BOW standards. The Dual PHY's uni...
4
0.0
XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI
These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces....
5
0.0
Nutcracker XSR Connectivity Chiplet
Core and analog logic may not always deploy at the same time in the same process. Maturing high performance analog typically takes longer in moving to...