Design & Reuse
RISC-V Platform (22)
RISC-V Processor (124)
RISC-V Verification (5)
124 IP
1
200.0
K-Core Architecture Processors
Traditional processors no longer strike the right balance between high performance, energy consumption, and cost. Keysom processors deliver powerful ...
2
100.0
ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performanc...
3
100.0
RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enh...
4
100.0
ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enha...
5
100.0
ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performanc...
6
100.0
ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. ...
7
100.0
32-bit Embedded RISC-V Functional Safety Processor
The EMSA5-FS is a processor core designed for functional safety. The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient...
8
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
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9
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
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10
25.0
Ultra-Low-Power Deeply Embedded RISC-V Processor
The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipel...
11
25.0
Superscalar Out-of-Order Execution Multicore Cluster
AndesCore™ AX65 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on AndeStar™ V5 architectu...
12
20.0
High Bandwidth In-Order RISC-V CPU IP Core
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13
20.0
icyflex-V Low-power 32-bit RISC-V processor
The icyflex-V 32-bit processor core is based on the RV32IMC open-instruction set architecture (ISA) defined by the RISC-V foundation and, as such, is ...
14
16.0
RISC-V Processor - RV12 - 32/64 bit, Single Core CPU
The RV12 is a highly configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market. The RV12 is a member of ...
15
15.5556
Avispado 222 - High Bandwidth RISC-V IP Core
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16
12.0
S5 Series - The S5 Series offers 64-bit RISC-V performance with 32-bit power and area
The S5 Series offers 64-bit RISC-V performance with 32-bit power and area. The S5 core has a 5-6 stage pipeline, offering a great balance between perf...
17
10.0
DSP-enhanced ARC EMxD and HS4xD processors provide combined RISC + DSP processing for computation intensive applications
Synopsys has a long history of working with DSP customers to meet the ever-increasing computation requirements, offering lowest power consumption for ...
18
5.0
Ultra Compact 32-bit RISC-V CPU Core
AndesCore™ N22 is a 32-bit 2-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications that require low energy consumpti...
19
5.0
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including "G" ("IMAFD") standard instructions, "C" 16-bit compre...
20
5.0
64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. I...
21
5.0
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the IMAFD standard instru...
22
5.0
Compact High-Speed 64-bit CPU Core
AndesCore™ NX25F is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is tailored for high-perf...
23
5.0
Compact High-Speed 64-bit CPU for Real-time and Linux Applications
AndesCore™ AX25 is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is tailored for high-perfo...
24
5.0
Compact High-Speed 32-bit CPU Core
AndesCore™ N25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of delivering high per-...
25
5.0
Compact High-Speed 32-bit CPU Core with DSP
AndesCore™ D25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of delivering high per-...
26
5.0
64-Bit 8-stage superscalar processor that supports RISC-V specification, including GCN
The 64-bit NX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit comp...
27
5.0
64-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 64-bit AX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit comp...
28
5.0
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP (DSP)
The 32-bit D45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compr...
29
5.0
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 32-bit A45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compr...
30
5.0
32-bit High Performance Single/Multicore RISC System-on-Chip with code compression
The CC150-S is a synthesisable Verilog model of a high performance 32-bit RISC processor based System-on-Chip. The model is highly configurable and em...
31
5.0
32-bit High Performance Single/Multicore RISC Processor
The CC100-C processor is a synthesisable Verilog model of a high performance 32-bit RISC processor. The model is highly configurable, and particularly...
32
5.0
32-bit High Performance Single/Multicore RISC Processor with code compression
The CC150-C processor is a synthesisable Verilog model of a high performance 32-bit RISC processor. The model is highly configurable, and particularly...
33
5.0
32-bit High Performance Single/Multicore RISC System-on-Chip
The CC100-S is a synthesisable Verilog model of a high performance 32-bit RISC processor based System-on-Chip. The model is highly configurable and em...
34
5.0
Compact, Secure and Performance Efficiency 32-bit RISC-V Core
AndesCore™ D23 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5/V5e architecture for embedded applications with small gate count, and so...
35
2.0
RV12 - RISC-V Processor
The RV12 is a highly configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market. The RV12 is a member of ...
36
0.0
64-bit RISC-V CPU with M, Zicsr extensions and External Debug support
The DRV64IMZicsr is a 64-bit RISC-V CPU with M, Zicsr extensions and External Debug support. As a part of the DRVX Core Family this unique CPU offers:...
37
0.0
32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
AndesCore™ A46MP(V) 32-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture a...
38
0.0
x2 - 8-bit RISC Microcontroller
The DFPIC166X is a low-cost, high performance, 8-bit, fully static soft IP Core. The core has been designed with a special concern about low power con...
39
0.0
RISC-V processor - 32 bit, 5-stage pipeline
The L50(F) is a medium-sized, efficient 32-bit embedded RISC-V processor aimed at embedded systems with mid-range processing requirements. The core ha...
40
0.0
Compact, efficient 64-bit RISC-V processor with 5-stage pipeline
The H50 is an entry level, compact, efficient 64-bit embedded RISC-V processor aimed at embedded systems requiring a large address space. The core has...
41
0.0
32-bit RISC CPU for low power aplications
VinRZ5110 is a low power, high performance 32-bit processor solution targeting embedded applications where low power and system cost are of utmost imp...
42
0.0
32-bit High Performance RV32GC Single/Multicore RISC System-on-Chip
The CCRV32ST-S is a synthesisable Verilog model of a high performance 32-bit RV32GC System-on-Chip. The model is highly configurable and embeds a wide...
43
0.0
Low Power RISCV CPU
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44
0.0
Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core. It implements a single-issue, in-order, 5-stage execution pipeline, a...
45
0.0
Compact and Performance Efficiency 32-bit RISC-V Core
The AndesCore™ N225 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with small gate count, and s...
46
0.0
Dual-issue Linux-capable RISC-V core
The A730 is a dual-issue, in-order, 64-bit application processor capable of running Linux. The core is compatible with the RISC-V RVA22 profile. The c...
47
0.0
RISC-V high performance CPU
Ventana s first generation RISC-V high performance CPU is targeted at data center, edge, and other general computing applications. The configurable CP...
48
0.0
32 bit - Compact RISC-V Processor Core
The L11 is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-st...
49
0.0
32 Bit - Embedded RISC-V Processor Core
The L31(F) is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3...
50
0.0
AndesCore N25F-SE 32-bit CPU IP
AndesCore™ N25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications. Approved based on...