Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
Subscribe to D&R SoC News Alert
English
Mandarin
Register
Login
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Subscribe to D&R SoC News Alert
Register
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
Browse Memory Controller & PHY
DDR (642)
eMMC (20)
Flash Controller (8)
HBM (32)
Mobile SDR Controller (4)
NAND Flash (35)
NVM Express (20)
ONFI Controller (6)
SD (14)
SDIO Controller (3)
SDRAM Controller (107)
SRAM Controller (3)
Other (18)
NAND Flash Controller (22)
NAND Flash PHY (13)
SD Controller (8)
SD PHY (6)
You must be registered with the D&R website to view the full search results, including:
Complete datasheets for
IP Core
products
Contact information for
IP Core
suppliers
Please
log in
here to your account.
New user ?
Signup here
.
642 IP
401
0.0
LPDDR3 Controller IP
LPDDR3 interface provides full support for the LPDDR3 interface, compatible with JESD209-3,JESD209-3B and JESD209-3C specification. Through its LPDDR3...
402
0.0
LPDDR4 Controller IP
LPDDR4 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR4 JESD209-4, JESD209-4A, JESD209-4B, JESD209-4C, JESD209-4X and JESD2...
403
0.0
LPDDR4 multiPHY V2 in UMC (28nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
404
0.0
LPDDR4/ DDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
405
0.0
LPDDR4/DDR4/DDR3 PHY - TSMC 22nmULL
SP-LPD4/D43_PHY16BIT-T22ULL is designed for DRAM controller to connect to the LPDDR4/DDR4/3 DRAM memory device. It contains a DDR PHY Control Unit(DPC...
406
0.0
LPDDR4X / LPDDR4 Controller
The Rambus LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile, Internet of ...
407
0.0
LPDDR4X/4/3/DDR4 PHY for TSMC 12nm and 16nm
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and exten...
408
0.0
LPDDR4X/4/3/DDR4/3/3L PHY + Controller
INNOSILICON™ LPDDR4X/4/3/DDR4/3/3L Combo IP is a customizable Mixed-Signal DDR memory interface suite. The Combo IP provides turnkey physical interfac...
409
0.0
LPDDR5 Controller IP
LPDDR5 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5 JESD209-5 and JESD209-5A specification and DFI-version 5.0 specific...
410
0.0
LPDDR5 IP - High performance and low power
With sophisticated architecture and advanced technology, KNiulink provide LPDDR5 with high performance and low power. In advanced process nodes, KNiu...
411
0.0
LPDDR5/4/4X Controller with Inline Memory Encryption (IME) Security Module
SynopsysLPDDR5/4/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, LP...
412
0.0
LPDDR5/4X PHY IP for TSMC N7
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly succe...
413
0.0
LPDDR5/5X Memory PHY for TSMC N3P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly succe...
414
0.0
LPDDR5/5X Memory PHY for TSMC N4P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly succe...
415
0.0
LPDDR5/5X Memory PHY for TSMC N5P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly succe...
416
0.0
LPDDR5X Controller IP
LPDDR5X is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5X draft JEDEC specification and DFI-version 5.0 specification Compl...
417
0.0
LPDDR5X/5/4X Controller with Inline Memory Encryption (IME) Security Module
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
418
0.0
LPDDR5X/5/4X PHY IP on TSMC N3P
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...
419
0.0
MRDIMM DDR5 & DDR5/4 PHY & Controller
INNOSILICON™ DDR5 IP includes the MRDIMM DDR5 PHY and DDR5/4 Combo PHY and corresponding controllers for ICs requiring access to JEDEC compatible SDRA...
420
0.0
TSMC CLN12FFCLL 12nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
421
0.0
TSMC CLN12FFCLL 12nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
422
0.0
TSMC CLN12FFCLL 12nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
423
0.0
TSMC CLN12FFCLL 12nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
424
0.0
TSMC CLN12FFCLL 12nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
425
0.0
TSMC CLN12FFCLL 12nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
426
0.0
TSMC CLN12FFCLLLVT 12nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
427
0.0
TSMC CLN12FFCLLLVT 12nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
428
0.0
TSMC CLN12FFCLLLVT 12nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
429
0.0
TSMC CLN12FFCLLLVT 12nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
430
0.0
TSMC CLN12FFCLLLVT 12nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
431
0.0
TSMC CLN12FFCLLLVT 12nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
432
0.0
TSMC CLN12FFCP 12nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
433
0.0
TSMC CLN12FFCP 12nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
434
0.0
TSMC CLN12FFCP 12nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
435
0.0
TSMC CLN12FFCP 12nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
436
0.0
TSMC CLN12FFCP 12nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
437
0.0
TSMC CLN12FFCP 12nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
438
0.0
TSMC CLN16FFCLL 16nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
439
0.0
TSMC CLN16FFCLL 16nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
440
0.0
TSMC CLN16FFCLL 16nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
441
0.0
TSMC CLN16FFCLL 16nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
442
0.0
TSMC CLN16FFCLL 16nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
443
0.0
TSMC CLN16FFCLL 16nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
444
0.0
TSMC CLN16FFCLLLVT 16nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
445
0.0
TSMC CLN16FFCLLLVT 16nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
446
0.0
TSMC CLN16FFCLLLVT 16nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
447
0.0
TSMC CLN16FFCLLLVT 16nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
448
0.0
TSMC CLN16FFCLLLVT 16nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
449
0.0
TSMC CLN16FFCLLLVT 16nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
450
0.0
TSMC CLN16FFPGL 16nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
|
Previous
|
9
|
10
|
11
|
...
|
Next
|