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Browse Memory Controller - PHY IP
DDR (630)
eMMC (18)
Flash Controller (8)
HBM (30)
Mobile SDR Controller (4)
NAND Flash (35)
NVM Express (21)
ONFI Controller (4)
SD (12)
SDIO Controller (3)
SDRAM Controller (107)
SRAM Controller (3)
Other (21)
NAND Flash Controller (22)
NAND Flash PHY (13)
SD Controller (7)
SD PHY (5)
18 IP
1
40.0
eMMC 5.1 Device Controller
Arasan's eMMC 5.1 Memory controller is compliant with the latest eMMC 5.1 specification released by JEDEC. The controller provides a peak bandwidth of...
2
30.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-NS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
3
20.0
eMMC 5.1 Host Controller
The eMMC 5.1 Host Controller IP from Arasan Chip Systems is a highly integrated host controller IP solution. This IP handles all of the timing and ...
4
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPC PLUS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
5
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FF PLUS LL
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
6
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FFC NS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
7
10.0
SD/eMMC in TSMC (28nm, 16nm, 12nm, N7, N6)
To address today’s content capacity and bandwidth requirements, JEDEC and SD Association continue to define new functionality and enhancements for emb...
8
10.0
Low-power SD/eMMC host controller IP provides advanced high-performance 32- and 64-bit AXI interface to the SoC
The Synopsys SD/eMMC Host Controller IP addresses the growing storage needs of mobile, consumer, IoT and automotive applications. The IP provides adva...
9
10.0
SD/eMMC in GF (12nm)
To address today’s content capacity and bandwidth requirements, JEDEC and SD Association continue to define new functionality and enhancements for emb...
10
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 40LP-EW
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
11
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28 HPC-EW
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
12
5.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPC-NS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
13
3.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-EW
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
14
2.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FF-NS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
15
1.0
eMMC/SDIO/SD
INNOSILICON eMMC/SD/SDIO Combo IP solution consists of a host controller and PHY and supports eMMC/SD/SDIO devices. When connecting the eMMC device, t...
16
0.3729
eMMC 5.1 /SD-SDIO3.0 Host Controller & PHY
Dolphin Technology delivers custom, synthesizable IP to support specific design requirements. The DTI EMMC controller provides the logic to integrate ...
17
0.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FF PLUS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
18
0.0
eMMC Device Controller
eMMC 5.1 IP fully compliant to JEDEC JESD-84-B51, supporting full backwards compatibility, high speed SDR, high speed DDR, HS200 and HS400 transfer mo...
