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Browse Memory Controller - PHY IP
DDR (630)
eMMC (18)
Flash Controller (8)
HBM (30)
Mobile SDR Controller (4)
NAND Flash (35)
NVM Express (21)
ONFI Controller (4)
SD (12)
SDIO Controller (3)
SDRAM Controller (107)
SRAM Controller (3)
Other (21)
NAND Flash Controller (22)
NAND Flash PHY (13)
SD Controller (7)
SD PHY (5)
21 IP
1
28.0
Slave side SPI/QPI controller 133MHZ
This SPI/QPI PHY IP is fully compatible with Macronix NOR Flash SPI products. Max frequency hardware proven is 133MHz. Can be used for a variety of me...
2
10.0
Universal Multiport Memory Controller - LPDDR 3/2 Controller
Mobiveil's UMMC LPDDR3/2 Controller is a highly flexible and configurable design. It is targeted for high bandwidth access and low power consumption s...
3
5.0
Frame Rate Converter for 4K
TMC’s FRUC (Frame Rate Up-Converter) for 4K RTL Core utilizes proprietary ”DMNA- MEMC” (Motion Estimation and Motion Compensation) algorithm which gen...
4
3.0
SD Card Host Controller
The logiSDHC is the Secure Digital (SD) card Host Controller IP core from the Xylon logicBRICKS IP core library. It is designed to transfer data from...
5
1.0
QUAD SPI Memory controller
The core maps a memory device connected via the Serial Peripheral Interface (SPI) into AMBA AHB address space. Reading memory is performed by directly...
6
0.118
Controller IP, System Power/Clock Management, Soft IP
The system control unit, is designed to provide a power and clock management functions for System-on-a-Chip (SoC) to handle operations of the chip tha...
7
0.118
DFI3.1 Wrapper for DDR3/DDR4/LPDDR2/LPDDR3 PHY
DFI3.1 Wrapper for DDR3/DDR4/LPDDR2/LPDDR3 PHY...
8
0.118
Embedded flash controller
The embedded flash controller (EFC) is flash memory device controlling apparatus and developed based on the Embedded Flash Macro (EFM) of pFusion co. ...
9
0.118
Flash Memory pre-fetcher controller with AHB lite system
Flash Memory pre-fetcher controller with AHB lite system...
10
0.118
Embedded flash controller for UMC 55LP Spit Gate embedded Flash.
Embedded flash controller for UMC 55LP Spit Gate embedded Flash....
11
0.118
Embedded synchronous single port SRAM/ROM memory controller with AXI slave port.
Embedded synchronous single port SRAM/ROM memory controller with AXI slave port....
12
0.118
DDR2/3 Controller IP, DDR2/3 controller with DFI 2.1 interfaces, Support DDR1/DDR2/DDR3 SDRAM, Soft IP
DDR2/3 Combo SDRAM Controller....
13
0.118
Controller IP, SPI Flash controller, Soft IP
Flash Controller with SPI Interface....
14
0.0
Cache controller for fast NVM memories access and very low power consumption
R-Stratus-LP is THE new generation of cache controller for MCU applications whenever the application program is stored in a Non Volatile Memories (NVM...
15
0.0
Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption
R-Stratus-LPRR is THE new generation of cache controller for MCU applications whenever the application program is stored in a Non Volatile Memories (N...
16
0.0
Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption
R-Stratus-LPRR is an updated release of cache controller for MCU based on Non Volatile Memories (NVM) like eFlash or EEPROM. R-Stratus LPRR update con...
17
0.0
MMC Target Controller
A compact low power and scalable IP core which provides a simple, firmware-friendly cost-effective Physical Link interface for MultiMediaCard-based m...
18
0.0
Direct Memory Access Controller
The DDMA is a four-channel Direct Memory Access Controller. Its purpose is to transfer data between memories and peripherals to reduce CPU utilization...
19
0.0
Read-Modify-Write Core
The Read-Modify-Write (RMW) Core from Rambus handles misaligned bursts when an Error Correction Code (ECC) is being used. An ECC code word must be ca...
20
0.0
Multi-Port Front-End
The Rambus Multi-Port Front-End Core from Rambus provides a multi-port interface to Rambus Memory Controller Cores. Each user request is provided wit...
21
0.0
Reorder Core
The Reorder Core from Rambus reorders requests based on first on priority and second on throughput optimization. Throughput optimization includes m...