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Browse Memory Controller - PHY IP
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5 IP
1
20.0
112Gbps Serdes USR & XSR
With sophisticated architecture and advanced technology, KNL multi-mode D2D transceiver IP with PMA and PCS layer is designed for low power and high p...
2
20.0
Combo SerDes PHY
With sophisticated architecture and advanced technology, KNiulink multi-mode transceiver IP with PMA and PCS layer is designed for low power and high ...
3
20.0
UHS-II PHY
Silicon Library's world-first silicon proven UHS-II PHY supporting 1.56Gbps speed is available in various fabs/nodes, including TSMC6/12/40/85, GF28, ...
4
10.0
UHS-III PHY
Silicon Library's world-first silicon proven UHS-III PHY is available in SMIC65 now....
5
3.0
1.8V/3.3V Switchable GPIO With 5V I2C Open Drain & Analog in 16nm
16nm & 12nm Flip-Chip IO library with dynamically switchable 1.8V/3.3V GPIO, 5V I2C / SMBUS open-drain cell, 5V OTP cell, 1.8V & 3.3V analog cells, an...
