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Browse Memory Controller - PHY IP
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3 IP
1
80.0
OCTA SPI PSRAM Controller
THis controller supports Xccela open standard bus for digital interconnect and data communications suitable for Volatile and nonvolatile memories such...
2
9.0
32-bit SSRAM/PROM Controller
The 32-bit SSRAM/PROM Controller IP cores is an 32-bit SSRAM/PROM/IO controller that interfaces external Synchronous pipelined SRAM, PROM, and I/O to ...
3
0.118
SRAM/ROM Controller IP, SRAM/ROM Controller, Soft IP
Static memory controller with AXI interface....
