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Browse Interface Controller - PHY IP
AMBA AHB / APB/ AXI (196)
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18 IP
1
11.0
Die-to-Die (D2D) Interconnect
Lightweight die-to-die interconnect solution optimized for highest performance with the lowest power and area overhead...
2
10.0
Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5)
The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...
3
10.0
Die-to-Die, 112G Ultra-Extra Short Reach PHY in GF (12nm)
The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...
4
10.0
Die-to-Die, High Bandwidth Interconnect PHY in TSMC (N7, N5)
The Synopsys High-Bandwidth Interconnect PHY IP enables high bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale ...
5
10.0
Die-to-Die Controller IP
The Synopsys Die-to-Die Controller IP, optimized for latency, bandwidth, power and area, enables efficient inter-die connectivity in server, AI accele...
6
8.0
TSMC CLN5FF Glink 2.0 Die-to-Die PHY
IGAD2DY01A is a high speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions：Integrated Fan-Out (InFO) with RDL ...
7
8.0
TSMC CLN6FF/7FF Die-to-Die Interface PHY
This IGAD2DX01A test report shows the functional and characterization test result of GUC Die-to-Die Interface PHY IP for 8 Gbps operation. For IP deta...
8
0.0
GLink Multi-Slice PCS
GLink Multi-Slice PCS (IGDD2D004A) is a digital IP used to provide data bus alignment between different GLink Slices to ensure consistent data arrivin...
9
0.0
GLink AXI Wrapper
GLink (GLink-fs 2.x + PCS-replay) AXI Wrapper is a digital IP designed to support AMBA AXI3/AXI4 compliant bus of user interface and provide data bus ...
10
0.0
GLink CXS-Bridge
GLink (GLink-fs 2.x + PCS-replay) CXS-Bridge is a digital IP to interconnect between two dies that use Glink as a physical layer and provides AMBA CXS...
11
0.0
GLink Multi-Slice PCS
GLink Multi-Slice PCS (IGPD2D001A) is a digital IP used to provide data bus alignment between different GLink Slices to ensure consistent data arrivin...
12
0.0
TSMC CLN5FF GLink 2.3LL Die-to-Die PHY
IGAD2DY04A is a high-speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL...
13
0.0
TSMC CLN5FF GLink GPIO
IGID2DY01A GLink GPIO is one of the GLink series IPs. It provides low speed (up to 500 MHz) connection between two dies without requiring any initiali...
14
0.0
TSMC CLN5FF GLink 2.0 Die-to-Die PHY
IGPD2DY01A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL ...
15
0.0
TSMC CLN5FF GLink-3D Die-to-Die Master PHY
IGAD2DY02A is a GLink-3D high speed die-to-die interface Master PHY. It is used to transmit data between dies and assembled using TSMC System on Integ...
16
0.0
TSMC CLN7FF GLink-3D Die-to-Die Slave PHY
IGAD2DX03A is a GLink-3D high speed die-to-die interface Slave PHY. It is used to transmit data between dies and assembled using TSMC System on Integr...
17
0.0
TSMC CLN3FFE GLink 2.3LL Die-to-Die PHY
IGPD2DZO1A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions, Integrated Fan-Out (InFO) with the ...
18
0.0
XSR PHY for TSMC N5
The Synopsys USR/XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip m...
