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Browse Interface Controller - PHY IP
AMBA AHB / APB/ AXI (196)
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6 IP
1
50.0
PCIe Gen3 to SRIO Gen3 Bridge (FPGA)
Mobiveil’s PCIe Gen3 to SRIO Gen3 Bridge is a high-performance FPGA-based protocol conversion IP that enables seamless communication between PCI Expre...
2
40.0
RapidIO Controller with V4.1 Support
Mobiveil's RapidIO Controller solution (GRIO) is a highly flexible and configurable IP. The Mobiveil RapidIO Controller Solution can be used as a Host...
3
30.0
RapidIO to AXI Bridge (RAB)
Mobiveil's RapidIO-AXI Bridge (RIO-AXI Bridge) is a highly flexible and configurable IP used along with Mobiveil native RapidIO Controller (GRIO) to p...
4
6.0
RapidIO PHY
RapidIO is a high performance, low pin count, packet switched, full duplex, system level interconnect architecture. The architecture addresses the nee...
5
1.0
RapidIO 2.0 PHY & Controller
The Innosilicon Serdes Combo PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interf...
6
0.0
RapidIO EndPoint Controller IP
RapidIO EP interface provides full support for the RapidIO EP synchronous serial interface, compatible with RapidIO Interconnect 2.2 specification. Th...
