Design & Reuse
6 IP
1
100.0
Complete USB Type-C Power Delivery PHY, RTL, and Software
The OTI9108 is a complete single transceiver front end for data USB PD Type-C (baseband) communications. It has a register interface which, with an MP...
2
50.0
USB-C 3.2 SS/SSP PHY in Type-C in TSMC (N7, N6, N5, N3E)
The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...
3
9.0
USB 10Gbps Device Controller
Leveraging the benefits of USB 3.2 Gen 1 device controller, USB 3.2 Gen 2 is designed using the FPGA built-in transceiver. It is a one-stop solution f...
4
6.7619
USB Super Speed+ PHY (4nm)
The USB PHY IP consists of a hard macro PMA and soft macro PCS compliant with USB 3.2 specification, supporting SuperSpeed+ (10 Gbps) operation. This ...
5
1.0
Super-Speed Plus USB 3.2 Hub Controller
USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...
6
0.0
USB 3.x PHY for TSMC
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory fo...