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1886 IP
151
20.0
HDMI 2.0 RX PHY
Silicon Library's HDMI 2.0 RX IP supports up to 6Gbps. This silicon proven IP is available in TSMC 12 / 40. Please also refer to our LINK IP....
152
20.0
HDMI 2.0 RX PHY in Samsung (8nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
153
20.0
HDMI 2.0 TX PHY
Silicon Library's HDMI 2.0 TX PHY IP supports up to 6Gbps. This silicon proven IP is available in TSMC 12. Please also refer to our LINK IP....
154
20.0
HDMI 2.0 TX PHY 6Gbps in SMIC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
155
20.0
HDMI 2.0 TX PHY 6Gbps in TSMC (28nm, 16nm, 12nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
156
20.0
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
157
20.0
HDMI 2.0/MHL TX Combo 6Gbps in TSMC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
158
20.0
HDMI 2.1 Audio PLL in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
159
20.0
HDMI 2.1 Audio PLL in TSMC (16nm, 12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
160
20.0
HDMI 2.1 eARC Rx PHY in GF (12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
161
20.0
HDMI 2.1 eARC RX PHY in TSMC (16nm, 12nm, N4, N6, N6C)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
162
20.0
HDMI 2.1 eARC Tx PHY in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
163
20.0
HDMI 2.1 eARC TX PHY in TSMC (16nm, 12nm, N6C)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
164
20.0
HDMI 2.1 Rx PHY 12Gbps in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
165
20.0
HDMI 2.1 RX PHY 12Gbps in TSMC (16nm, 12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
166
20.0
HDMI 2.1 Tx PHY in GF (12nm)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
167
20.0
HDMI 2.1 Tx PHY in Samsung (14nm)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
168
20.0
VESA VDC-M V1.2 Decoder
Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Decoder. Our groundbreaking product revolutionizes video compression technology, off...
169
20.0
VESA VDC-M Decoder
The Video Electronics Standards Association (VESA®) introduced the VESA Display Compression-M (VDC-M) standard, a new display interface compression st...
170
20.0
MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
171
20.0
MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
172
20.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm, N6, N6C, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
173
20.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
174
20.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N4C, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
175
20.0
MIPI C-PHY/D-PHY Combo(5nm, 7nm, 12/16nm, 28nm, 40nm, 55nm)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...
176
20.0
MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
177
20.0
MIPI CSI-2 Tansmitter v 1.3, C-PHY compatible
The MIPI Camera Serial Interface (CSI-2) Transmitter, typically resides in a mobile platform’s camera module, and communicates over a D-PHY/C-PHY link...
178
20.0
MIPI D-PHY ( DPHY ) 1.2 RX
Silicon Library's MIPI D-PHY ( DPHY ) 1.2 RX PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available...
179
20.0
MIPI D-PHY ( DPHY ) 1.2 TX
Silicon Library's MIPI D-PHY ( DPHY ) 1.2 TX PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. ...
180
20.0
MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
181
20.0
MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
182
20.0
MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
183
20.0
MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
184
20.0
MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
185
20.0
MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
186
20.0
MIPI D-PHY Bidirectional 4 Lanes in TSMC (40nm, 28nm, 16nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
187
20.0
MIPI D-PHY Rx-Only 2 Lanes in GF (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
188
20.0
MIPI D-PHY Rx-Only 2 Lanes in SMIC (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
189
20.0
MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
190
20.0
MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
191
20.0
MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
192
20.0
MIPI D-PHY Rx-Only 4 Lanes in SMIC (40nm, 28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
193
20.0
MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
194
20.0
MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
195
20.0
MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
196
20.0
MIPI D-PHY Tx-Only 4 Lanes in GF (12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
197
20.0
MIPI D-PHY Tx-Only 4 Lanes in SMIC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
198
20.0
MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6, N6C)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
199
20.0
MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
200
20.0
MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between application processor and displays
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
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